INST_CHKA_LDC_ALAT.INT

The number of all advanced check load (chk.a) and check

 

load (ld.c) instructions that reach retirement. Counts only

 

retired integer instructions.

INST_FAILED_CHKA_LDC_ALAT.FP

The number of failed advanced check load (chk.a) and

 

check load (ld.c) instructions that reach retirement. Counts

 

only failed floating-point instructions.

INST_FAILED_CHKA_LDC_ALAT.INT

The number of failed advanced check load (chk.a) and

 

check load (ld.c) instructions that reach retirement. Counts

 

only failed integer instructions.

Percent data speculation miss

Percentage of retired chk.a /ld.c instructions that failed.

Percent float advanced check load

Percentage of floating-point chk.a /ld.c floating-point

 

instructions, with respect to all chk.a /ld.c instructions.

Percent integer advanced check load

Percentage of retired chk.a /ld.c integer instructions that

 

failed.

Percent failed float advanced check

Percentage of floating-point chk.a /ld.c failed instructions

load

with respect to all chk.a /ld.c failed instructions.

Percent integer advanced check load

Percentage of integer chk.a /ld.c instructions with respect

 

to all chk.a /ld.c instructions.

Percent float ALAT miss

Percentage of floating-point components in all the misses

 

incurred by instructions accessing the ALAT.

Percent integer ALAT miss

Percentage of integer components in all the misses incurred

 

by instructions accessing the ALAT.

Advanced check load per kinst

The number of data speculation events per 1000 retired

 

instructions.

Failed advanced check load per kinst

The number of data speculation fail events per 1000 retired

 

instructions.

% of cycles lost due to stalls

Percent of cycles lost due to stalls.

% Core cycles due to this thread

This indicates the percentage of available processor cycles

 

that the measured process consumed. The other processor

 

cycles were consumed by other process(es) running in the

 

core's other hyperthread or were lost to HyperThreading

 

overhead.

Metrics for Integrity Servers Intel® Itanium® 9500 Processors Systems

CPU_OP_CYCLES.ALL

CPU_OP_CYCLES.ALL:all_threads=true

IA64_INST_RETIRED

CYC_BE_BUBBLE.ANY DSPEC_CHKA_LDC_FAIL.ANY

DSPEC_CHKA_LDC_FAIL.FP DSPEC_CHKA_LDC_FAIL.INT DSPEC_CHKA_LDC.ANY

The number of variable clock cycles. (When charge rationing is on, the period of the cycle could change.) It does not count cycles when the CPU is in low power mode.

When HyperThreading is on, this is the number of variable clock cycles used by the hyperthread of a specific process.

The number of variable clock cycles used by both hyperthreads. Available only when HyperThreading is on.

The number of retired instructions excluding hardware-generated RSE operations. This event includes all retired instructions including predicated off instructions and nop instructions.

Number of Backend cycles stalled.

Any ALAT failed advanced check load (chk.a) or check load (ld.c).

ALAT failed floating point chk.a ld.c. ALAT failed integer chk.a ld.c.

Any ALAT chk.a ld.c.

alat Measurement Report Description 173