Intel 87C196CB, 8XC196NT user manual Table A-3. Signal Descriptions Continued, A-11

Models: 8XC196NT 87C196CB

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SIGNAL DESCRIPTIONS

 

 

Table A-3. Signal Descriptions (Continued)

Name

Type

Description

 

 

 

PROG#

I

Programming Start

 

 

During programming, a falling edge latches data on the PBUS and begins

 

 

programming, while a rising edge ends programming. The current location is

 

 

programmed with the same data as long as PROG# remains asserted, so the

 

 

data on the PBUS must remain stable while PROG# is active.

 

 

During a word dump, a falling edge causes the contents of an OTPROM

 

 

location to be output on the PBUS, while a rising edge ends the data transfer.

 

 

PROG# is multiplexed with P2.2 and EXTINT.

PVER

O

Program Verification

 

 

 

 

During slave or auto programming, PVER is updated after each programming

 

 

pulse. A high output signal indicates successful programming of a location,

 

 

while a low signal indicates a detected error.

 

 

PVER is multiplexed with P2.0 and TXD.

RD#

O

Read

 

 

Read-signal output to external memory. RD# is asserted only during external

 

 

memory reads.

 

 

RD# is multiplexed with P5.3 and SLPRD#.

READY

I

Ready Input

 

 

This active-high input signal is used to lengthen external memory cycles for

 

 

slow memory by generating wait states in addition to the wait states that are

 

 

generated internally.

 

 

When READY is high, CPU operation continues in a normal manner with wait

 

 

states inserted as programmed in the chip configuration registers . READY is

 

 

ignored for all internal memory accesses.

 

 

READY is multiplexed with P5.6.

RESET#

I/O

Reset

 

 

A level-sensitive reset input to and open-drain system reset output from the

 

 

microcontroller. Either a falling edge on RESET# or an internal reset turns on a

 

 

pull-down transistor connected to the RESET# pin for 16 state times. In the

 

 

powerdown and idle modes, asserting RESET# causes the chip to reset and

 

 

return to normal operating mode. After a device reset, the first instruction fetch

 

 

is from FF2080H.

RXCAN

I

Receive

 

 

This signal carries messages from other nodes on the CAN bus to the

 

 

integrated CAN controller.

RXD

I/O

Receive Serial Data

 

 

In modes 1, 2, and 3, RXD receives serial port input data. In mode 0, it

 

 

functions as either an input or an open-drain output for data.

 

 

RXD is multiplexed with P2.1 and PALE#.

SC1:0

I/O

Clock Pins for SSIO0 and 1

 

 

For handshaking mode, configure SC1:0 as open-drain outputs.

 

 

This pin carries a signal only during receptions and transmissions. When the

 

 

SSIO port is idle, the pin remains either high (with handshaking) or low (without

 

 

handshaking).

 

 

SC0 is multiplexed with P6.4, and SC1 is multiplexed with P6.6.

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Page 132
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Intel 87C196CB, 8XC196NT user manual Table A-3. Signal Descriptions Continued, A-11