Intel 87C196CB Programming a Message Acceptance Filter, Bit Time Requirement Comments Segment

CAN SERIAL COMMUNICATIONS CONTROLLER

Table 7-11. Bit Timing Requirements for Synchronization

Bit Time	Requirement	Comments
Segment
	≥ 3tq	minimum tolerance with 1tq propagation delay allowance
tTSEG1	≥ tSJW + tPROP	for single-sample mode
	≥ tSJW + tPROP + 2tq	for three-sample mode
tTSEG2	≥ 2tq	minimum tolerance
	≥ tSJW	if tSJW > tTSEG2 , sampling may occur after the bit time

7.4.4Programming a Message Acceptance Filter

The mask registers provide a method for developing an acceptance filtering strategy. Without a filtering strategy, a message object could accept an incoming message only if their identifiers were identical. The mask registers allow a message object to ignore one or more bits of incoming message identifiers, so it can accept a range of message identifiers.

The standard global mask register (Figure 7-9) applies to messages with standard (11-bit) mes- sage identifiers, while the extended global mask register (Figure 7-10) applies to messages with extended (29-bit) identifiers. The message 15 mask register (Figure 7-11) provides an additional filter for message object 15, to allow it to accept a greater range of message identifiers than mes- sage objects 1–14 can. Clear a mask bit to accept either a zero or a one in that position.

The CAN controller applies the appropriate global mask to each incoming message identifier and checks for an acceptance match on message objects 1–14. If no match exists, it then applies the message 15 mask and checks for a match on message object 15.

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