6DATA COMMUNICATION USING THE NON PROCEDURE PROTOCOL
4)The device completing the INPUT instruction turns ON when the reading of receive data is completed.
When the complete device + 1 (abnormal completion signal) turns ON, the error code is stored in the control data completion status (S1 + 1).
(Program example)
When the Q series C24 I/O signals are from X/Y00 to X/Y1F:
Designate the receive channel.
Clear the reception result and receive data count storage device to 0.
Designate the allowable receive data count.
With normal completion, the receive data within the allowable receive data count (user designated) is read from the receive data storage area in the buffer memory.
• Once the INPUT instruction is executed, the user designated read completion signal (M0) turns ON for 1 scan.
• The reading of receive data and switching of the ON/OFF status are performed by the PLC CPU.
The abnormal completion flag is reset by an external command.
|
| For normal completion |
| |
D 0 |
| Interface number |
| (1) |
|
| |||
D 1 |
| Reception result |
| (0) |
D 2 |
| Receive data count |
| (n) |
D 3 |
| Allowable receive data count | (10) | |
D10 |
| Receive data |
|
|
to |
| to |
|
|
D m |
| Receive data |
|
|
|
| For abnormal completion | ||
|
| |||
D 0 |
| Interface number |
| (1) |
|
| |||
D 1 |
| Reception result | (other than 0) | |
D 2 |
| Receive data count |
| (n) |
D 3 |
| Allowable receive data count | (10) | |
D10 |
| Receive data |
|
|
to |
| to |
|
|
D x |
| Receive data |
|
|
|
|
|
|
|
Q series C24
Address Buffer memory
258H Data reception result storage area
600H Receive data count storage area
601H
to 
Receive data storage area
7FFH
When the receive data count is larger than the allowable receive data count, only the data up to the allowable receive data count will be stored and the excess data will be discarded.
From the buffer memory (address 258H)
From the buffer memory (address 600H)
Data received prior to an error occurrence will be stored in the receive data storage device.
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