Mitsubishi Electronics QJ71C24/-R2, QJ71C24N, SH-080007 manual 175

7 DATA COMMUNICATIONS USING BIDIRECTIONAL PROTOCOL

MELSEC-Q

7.3Processing when Simultaneous Transmission Performed During Full-Duplex Communications

This section explains the processing when simultaneous transmissions occur in full- duplex communication.

7.3.1 Processing when simultaneous transmissions occur

This section explains the processing performed by the Q series C24 when the external device and the Q series C24 transmit at the same time during data communications using the bidirectional protocol.

Since the external device and the Q series C24 do not transmit at the same time during half-duplex communications (see User's Manual (Application) Chapter 8), this section does not have to be read.

When an external device and the Q series C24 transmit at the same time, the Q series C24 processing depends on the setting of "Simultaneous transmission data valid/invalid designation" with GX Configurator-SC.

The GX Configurator-SC setting value, "Simultaneous transmission data valid/invalid designation" is stored in the following areas of the buffer memory.

Simultaneous transmission data valid/invalid designation area (addresses: 9BH/13BH) The Q series C24 communication data processing for each setting is described in Section 7.3.2.

Setting contents	Value set to buffer memory	Q series C24 processing contents
with GX Configurator-SC	(Address 9BH/13BH)	Message transmit processing	Message receive processing
		Waits to receive the response message	Transmits a response message (2)-2)
		(1)-2) while checking time-out after data	after data reception (2)-1) is complete.
Transmission data: Valid		transmission (1)-1) is complete.	Posts the receive data and receive
	0000H	Posts normal end or abnormal end	result to the PLC CPU through the
Receive data: Valid
		according to whether or not the PLC	buffer memory.
		CPU received a response message
		through the buffer memory.
		Posts a simultaneous transmission error	Transmits a response message (2)-2)
Transmission data: Invalid		to the PLC CPU through the buffer	after data reception (2)-1) is complete.
	0100H	memory after data transmission (1)-1).	Posts the receive data and receive
Receive data: Valid
		Does not wait for a response massage	result to the PLC CPU through the
		(1)-2) in reply to data transmission (1)-1).	buffer memory.
		Waits to receive the response message	Ignores data reception (2)-1) and
		(1)-2) while checking time-out after data	discards the received data.
Transmission data: Valid		transmission (1)-1) is complete.	Does not transmit a response
	0001H	Posts normal end or abnormal end	message (2)-2).
Receive data: Invalid
		according to whether or not the PLC	Does not inform the PLC CPU that
		CPU received a response message	data was received.
		through the buffer memory.
		Posts a simultaneous transmission error	Ignored data reception (2)-1) and
		to the PLC CPU through the buffer	discards the receive data.
Transmission data: Invalid	0101H	memory after data transmission (1)-1).	Does not transmit a response
Receive data: Invalid		Does not wait to a response massage	message (2)-2).
		(1)-2) in reply to data transmission (1)-1).	Does not inform the PLC CPU that
			data was received.

( )-m) is the number showing the correspondence with the messages in the illustration shown in Section 7.3.2.

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