4 SETTINGS AND PROCEDURES PRIOR TO OPERATION

MELSEC-Q

4)Even/odd parity setting

This sets whether the parity bit (vertical parity) should be odd parity or even parity when adding the parity bit (vertical parity), according to the specifications of the external device.

5)Stop bit setting

This sets the stop bit length for one character in data communicated with an external device, according to the specifications of the external device.

6)Sum check code setting

•This sets according to the specifications of the external device whether or not a sum check code is added to transmission and reception messages of each frame and format during data communication using the MC or bidirectional protocol.

•For an explanation of the message configuration and sum check code when a sum check code is added (set to Yes), see the applicable explanation of each protocol.

7)Write during RUN setting

•This sets according to the system specifications whether or not data transmitted using the MC protocol is written to the PLC CPU from an external device while the PLC CPU is running.

•When write during RUN is prohibited (disabled), the data is not written and an NAK message is returned if the external device requests the PLC CPU to write data while it is running.

•For an explanation of the functions available in this setting, check in the "write allowed setting" and "write prohibited setting" columns in the command list of the Reference Manual.

8)Setting modifications setting

This sets whether or not the following actions are allowed after starting up the Q series C24.

Changing data communication functions and transmission

•Specifications, and the switching mode of each interface

•Writing data to the flash ROM (writing the system setting values and user frame)

POINT

(1)A setting change in the connected interface side should be set to Allowed, in order to register a user frame to the flash ROM from an external device using the MC protocol.

(2)Setting changes in interfaces on the CH1 and CH2 sides should both be set to Allowed, in order to register the system setting values and user frames to the flash ROM from the PLC CPU.

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