1 OVERVIEW
(8)Functions supporting multiple CPU systems (Details are explained in the Reference Manual.)
(a)When accessing QCPUs in a multiple CPU system using the MC protocol or through GX Developer, it is possible to perform data communication such as reading/writing device data by specifying the QCPU to be accessed.
•When using the Q series C24 in a multiple CPU system, a QCPU controlling the Q series C24 (hereinafter referred to as the control PLC) should be specified using GX Developer.
It is also possible to mount a Q series C24 of function version A in a multiple CPU system and access to the only control PLC (PLC No.1).
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Peripheral device | Q series C24 |
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control PLC |
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| 1) | 2) | 3) | 4) | 1 | 2 | 1 |
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| C24 | Communication through GX Developer | |
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| Q series C24 |
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| Communication using the MC protocol | |||
Setting from |
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| 1) | : PLC No.1 | |||||
GX Developer |
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| 2) | : PLC No.2 | |
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| 3) | : PLC No.3 |
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| 4) | : PLC No.4 |
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| 1 : Module controlled by | |
PLC No.1
2 : Module controlled by PLC No.2
(b)When a Q series C24 CPU of function version B is used in a multiple CPU system, the following forms of data communication can be performed with the Q series C24.
1)It is possible to perform data communication using the non procedure/bidirectional protocols from the control PLC
2)It is possible to read the buffer memory from
Control PLC |
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| Dedicated instruction |
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FROM |
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instruction |
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Use the input/ | output signal as a | X | ||
output signal as | contact | Y | ||
a contact | It should be output | |||
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Q series C24 |
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Buffer memory |
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| Data communication |
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1 - 7 | 1 - 7 |