Canopy T1/E1 Multiplexer | September 2004 | |
| T1/E1 Multiplexer FPGA Version 3.4 | |
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Action | Steps |
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Set timing mode | NOTE: Timing mode applies to all four E1 lines. Loopback mode loops the | |
| T1/E1 Tx clock to the T1/E1 Rx. Recovered mode recovers the T1/E1 clock | |
| from the incoming T1/E1 over Ethernet bit stream (recovers the clock from | |
| the far end T1/E1). The default timing mode is Recovered. |
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| For master clock timing mode, enter |
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| set clock source loopback |
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| RESULT: The system responds |
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| Clock source is loopback |
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| For slave clock timing mode, enter |
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| set clock source recovered |
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| RESULT: The system responds |
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| Clock source is recovered |
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Set master clock | NOTE: This is the master clock reference for all four T1/E1 lines. | |
reference line | The default setting is T1/E1 Port 1. |
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| Enter set master clock reference line [1/2/3/4] | |
| where |
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| [1/2/3/4] represents T1/E1 ports 1 through 4. |
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| RESULT: The system responds |
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| Clk ref line; [1,2,3,4] |
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Set backup clock | NOTE: This is the backup clock reference for all four T1/E1 lines. The | |
reference line | backup clock reference becomes active only when the master clock | |
| reference line is unavailable. The default setting is T1/E1 Port 2. | |
| Enter set secondary clock reference line [1/2/3/4] | |
| where |
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| [1/2/3/4] represents T1/E1 ports 1 through 4. |
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| RESULT: The system responds |
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| Backup clk ref line; [1/2/3/4] |
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Log off | Enter lo. |
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| RESULT: The system responds goodbye. |
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end of procedure
Issue 3 | Page 43 of 73 |