Samsung KFN8GH6Q4M, KFKAGH6Q4M, KFM4GH6Q4M warranty Erase Suspend / Erase Resume Operation

Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)	FLASH MEMORY

3.11.2 Erase Suspend / Erase Resume Operation

The Erase Suspend/Erase Resume Commands interrupt and restart a Block Erase operation so that user may perform another urgent opera- tion on the block that is not being designated by Erase Operation.

Erase Suspend During a Block Erase Operation

When Erase Suspend command is written during a Block Erase operation, the device requires a maximum of 500us to suspend erase opera- tion. Erase Suspend Command issue during Block Address latch sequence is prohibited.

After the erase operation has been suspended, the device is ready for the next operation including a load, program, Lock, Unlock, Lock-tight, Hot Reset, NAND Flash Core Reset, Command Based Reset, or OTP Access.

The subsequent operation can be to any block that was NOT being erased.

A special case arises in Erase Suspend operation pertaining to the OTP. A Reset command is used to exit from the OTP Access mode. If the Reset-triggered exit from the OTP Access Mode happens after an Erase Suspend Operation, the erase routine could fail. Therefore to exit from the OTP Access Mode without causing the erase suspend/resume operation to fail, a 'NAND Flash Core Reset' command should be issued.

For the duration of the Erase Suspend period the following commands are not accepted:

•Block Erase/Erase Suspend

Erase Suspend and Erase Resume Operation Flow Chart

Start

Write 0 to interrupt register1)

Add: F241h DQ=0000h

Select DataRAM for DDP

Add: F101h DQ=DBS**

Write ‘Erase Suspend

Command’

Add: F220h DQ=00B0h

Wait for INT register

low to high transition for 500us

Add: F241h DQ=[15]=INT

Another Operation *

NOTE :

Write DFS of Flash

Add: F100h DQ=DFS**

Select DataRAM for DDP

Add: F101h DQ=DBS**

Write 0 to interrupt register1)

Add: F241h DQ=0000h

Write ‘Erase Resume

Command’

Add: F220h DQ=0030h

Wait for INT register low to high transition

Add: F241h DQ=[15]=INT

Check Controller Status Register

in case of Block Erase

*Another Operation ;

Load, Program, OTP Access2),

Hot Reset, Flash Reset, CMD Reset, Lock,Lock-tight, Unlock

** DBS, DFS is for DDP

1)‘Write 0 to interrupt register’ step may be ignored when using INT auto mode. Refer to chapter 2.8.18.1

2)If OTP access mode exit happens with Reset operation during Erase Suspend mode, Reset operatin could hurt the erase operation. So if a user wants to exit from OTP access mode without the erase operation stop, Reset NAND Flash Core command should be used.

Erase Resume

When the Erase Resume command is executed, the Block Erase will restart. The Erase Resume operation does not actually resume the erase, but starts it again from the beginning.

When an Erase Suspend or Erase Resume command is executed, the addresses are in Don't Care state.

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