Samsung KFN8GH6Q4M Copy-Back Program Operation with Random Data Input, Add F241h DQ=0000h DQ=Data

Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)	FLASH MEMORY

3.10 Copy-Back Program Operation with Random Data Input

The Copy-Back Program Operation with Random Data Input in Flex-MuxOneNAND consists of 3 phases, Load data into DataRAM, Modify data and program into designated page. Data from the source page is saved in one of the on-chip DataRAM buffers and modified by the host, then programmed into the destination page.

As shown in the flow chart, data modification is possible upon completion of load operation. ECC is also available at the end of load operation. Therefore, using hardware ECC of Flex-MuxOneNAND, accumulation of 4 bit error can be avoided.

Copy-Back Program Operation with Random Data Input will be effectively utilized at modifying certain bit, byte, word, or sector of source page to destination page while it is being copied.

Copy-Back Program Operation with Random Data Input Flow Chart

Start	Read ECC Status Register1
Write ‘DFS*, FBA’ of Flash	Add: FF00h DQ=ER1[12:8], ER0[4:0]
Add: F100h DQ=DFS, FBA	Read ECC Status Register2
Select DataRAM for DDP	Add: FF01h DQ=ER3[12:8], ER2[4:0]
Add: F101h DQ=DBS
	Read ECC Status Register3
Write ‘FPA, FSA’ of Flash	Add: FF02h DQ=ER5[12:8], ER4[4:0]
Add: F107h DQ=FPA, FSA
	Read ECC Status Register4
Write ‘BSA1), BSC’ of DataRAM	Add: FF03h DQ=ER7[12:8], ER6[4:0]
Add: F200h DQ=0800h2)
	NO
Write System Configuration	DQ[10]=0?
	YES
Register3)
Add: F221h DQ=ECC	Random Data Input
Write 0 to interrupt register4)	Add: Random Address in
	Selected DataRAM
Add: F241h DQ=0000h	DQ=Data
Write ‘Load’ Command	Write ‘DFS, FBA’ of Flash
	Add: F100h DQ=DFS, FBA
Add: F220h DQ=0000h
	Read Write Protection Status
Wait for INT register	Add: F24Eh DQ=US,LS,LTS
low to high transition
Add: F241h DQ[15]=INT	Write ‘FPA, FSA’ of Flash
	Add: F107h DQ=FPA, FSA2)
	Write ‘BSA1), BSC’ of DataRAM
	Add: F200h DQ=0800h2)
Map Out

NOTE :

1)BSA must be 1000.

2)FSA must be 00 and BSC must be 000 within program operation.

3)Writing System Configuration Register is optional.

4)‘Write 0 to interrupt register’ step may be ignored when using INT auto mode. Refer to chapter 2.8.18.1

Write System Configuration

Register3)

Add: F221h DQ=ECC

Write 0 to interrupt register4)

Add: F241h DQ=0000h

Write ‘Program’ Command

Add: F220h

DQ=0080h

Wait for INT register low to high transition

Add: F241h DQ[15]=INT

Read Controller

Status Register

Add: F240h DQ[10]=Error

NO

DQ[10]=0?

YES

Copy back completed

Copy back Error

* DBS, DFS is for DDP

- 81 -