Samsung KFM4GH6Q4M Erase Interleave1 @DDP Flow Chart, Add F100h DQ=DFS*, FBA Add F101h DQ=DBS

Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)						FLASH MEMORY
Erase Interleave1) (@DDP) Flow Chart
	Start				NO	Has Final Erase
						command been issued?
	Write ‘DFS*, FBA’ of Flash		Select DataRAM for DDP			YES
	Add: F100h DQ=DFS*, FBA		Add: F101h DQ=DBS*			(Final Erase status check)
			Wait for INT register			Select DataRAM for DDP
	Select DataRAM for DDP	2*				Add: F101h DQ=DBS*
			low to high transition
	Add: F101h DQ=DBS*
			Add: F241h DQ=[5]=EI
						Wait for INT register		3*
	Write ‘Erase’ Command		d Controller status register			low to high transition
	Add: F220h DQ=0094h	{ReaAdd: F240 DQ[10]=Error				Add: F241h DQ[5]=EI	}
	Select DataRAM for DDP		YES(Erase Pass)		Read Controller status register
	Add: F101h DQ=DBS*		DQ[10]=0?			Add: F240h DQ[10]=Error
1*	Check for INT register high		NO(Erase Fail)	NO(Erase Fail)
{						DQ[10]=0?

Add: F241h DQ[15]=INT
INT=1(Ready)	Erase Error	YES(Erase Pass)
	Erase completed
Write ‘DFS*, FBA’ of Flash
Add: F100h DQ=DFS*, FBA

Select DataRAM for DDP

Add: F101h DQ=DBS*

Write ‘Erase’ Command

Add: F220h DQ=0094h

*

1*

2*

3*

Erase Interleave can work in Auto INT Mode.

Interrupt register must not be written.

Check the chip status before command issues.

Previous Erase Status Check

DBS must be changed to indicate chip. Erase has been issued prior to current erase ongoing Final Erase Status Check

NOTE :

1) Erase Suspend and Erase Resume Operations are not supported in Erase Interleave(@DDP).

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