Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
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FLASH MEMORY
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
3.9 Program Operation See Timing Diagrams 6.11
The Program operation is used to program data from the on-chip BufferRAMs into the NAND FLASH memory array.
The device has two 2KB data buffers, 1 Page (4KB + 128B) in size. A page has 8 sectors of 512B each main area and 16B spare area. The
device can be programmed in units of 8 sectors at once.
Addressing for program operation
Within a block, the pages must be programmed consecutively from the LSB (least significant bit) page of the block to MSB (most significant
bit) pages of the block. Random page address programming is prohibited. Once users start to write data on a certain page, the page is a LSB
page, therefore LSB page does not have to always be a page 0.
NOTE :
The figure explains the order of page programming in a block. (x) indicates that the corresponding
page is the Xth page to be written in the block.
From the LSB page to MSB page
DATA IN: Data (1) Data (128)
(1)
(2)
(3)
(32)
(128)
Data register
Page 0
Page 1
Page 2
Page 31
Page 127
Ex.) Random page program (Prohibition)
DATA IN: Data (1) Data (128)
(2)
(32)
(3)
(1)
(128)
Data register
Page 0
Page 1
Page 2
Page 31
Page 127
:
:
:
:
From the LSB page to MSB page
DATA IN: Data (1) Data (64)
(1)
(2)
(3)
(32)
(64)
Data register
Page 0
Page 1
Page 2
Page 31
Page 63
Ex.) Random page program (Prohibition)
DATA IN: Data (1) Data (64)
(2)
(32)
(3)
(1)
(64)
Data register
Page 0
Page 1
Page 2
Page 31
Page 63
:
:
:
:
MLC Block
SLC Block