Samsung KFM4GH6Q4M, KFN8GH6Q4M, KFKAGH6Q4M warranty If program operation, Results in an error, Block

Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)	FLASH MEMORY

Interleave Cache Program Operation Flow Diagram

Start
	Select a chip for DDP1)
Select DataRAM for DDP1)
	Add: F100h	DQ=DFS
Add: F101h DQ=DBS
	Add: F101h	DQ=DBS
Write Data into DataRAM0,1	Check INT register
Add: DataRAM DQ=Data(4KB)	if it is ready5)
	Add: F241h DQ=8040h

Select a chip for DDP1) Add: F100h DQ=DFS Add: F101h DQ=DBS

Check INT register

if it is ready3)

Add: F241h DQ=8040h

NO

DQ[10]=0?

YES

Select DataRAM for DDP1)

Add: F101h DQ=DBS

	Write ‘DFS, FBA’ of Flash
		Read Controller
	Add: F100h DQ=DFS, FBA
		Status Register
		Add: F240h
		DQ[2]=Previous
Read Write Protection Status
	Add: F24Eh DQ=US,LS,LTS
		NO
		DQ[4] DQ[2] = 0?
	Write ‘FPA, FSA’ of Flash
	Add: F107h DQ=FPA, FSA2)		YES

NO

Read Controller Status Register

Add: F240h

DQ[2]=Previous

DQ[4] DQ[2] = 0?

YES

Check INT register

if it is ready5)

Add: F241h DQ=8040h

Read Controller

Status Register7)

Add: F240h DQ[10]=Error

NO

NO

Last PGM

for a chip?

Write ‘BSA3), BSC’ of DataRAM

YES

Add: F200h DQ=0800h2)

Write Data into DataRAM0,1

Write System Configuration

Add: DataRAM DQ=Data(4KB)

Register4)

Add: F221h DQ=ECC

Write ‘DFS, FBA’ of Flash

Add: F100h DQ=DFS, FBA

Write Cache PGM CMD

Add: F220h DQ=007Fh

Read Write Protection Status

Add: F24Eh DQ=US,LS,LTS

NO

Is it first input

Write ‘FPA, FSA’ of Flash

for a chip

Add: F107h DQ=FPA, FSA2)

YES

Write System Configuration

Register4)

* DBS, DFS is for DDP

Add: F221h DQ=ECC

*

If program operation

Write PGM CMD6)

results in an error,

Add: F220h DQ=0080h

map out the block

including the page in

error and copy the

target data to another

Program Error

block.

Write Data into DataRAM0,1

Add: DataRAM DQ=Data(4KB)

Write ‘DFS, FBA’ of Flash Add: F100h DQ=DFS, FBA

Read Write Protection Status Add: F24Eh DQ=US,LS,LTS

Write ‘FPA, FSA’ of Flash Add: F107h DQ=FPA, FSA2)

Write System Configuration

Register4)

Add: F221h DQ=ECC

Write PGM CMD6)

Add: F220h DQ=0080h

Wait for INT register low to high transition5)

Add: F241h DQ=8040h

Read Controller

Status Register7)

Add: F240h DQ[10]=Error

DQ[10]=0?

YES

complete

NOTE :

1)DBS must be set before data input.

2)FSA must be 00 and BSC must be 000 within program operation.

3)BSA must be 1000.

4)Writing System Configuration Register is optional.

5)Host is strongly recommended to see the INT register(F241h) of each chip.

6)Once ‘PGM command’ is issued onto a chip, the same command(PGM) must be issued onto another chip. If not, Samsung cannot gurantee the following oper- ation.

7)If error bit is set at this step, DQ[1]~[4] shoulde be checked in order to find where the error occurred.

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