Theory of IEC HSBY Operation

State Ram Transfer and Scan Time

Reduce Scan The state RAM transfer area contains all the state RAM values that are passed

Timebetween the Primary and Standby controllers. The size of the transfer area is as large as the total size of your controller’s state RAM.

As the simplified block diagram below shows, all 0x references in the state RAM transfer area are transferred first, then all 1x references, followed by all the 3x references, and finally all the 4x references.

In the Quantum HSBY system, IEC HSBY does not allow customizing the transfer area. This means the whole state RAM is transferred in IEC HSBY, except for the nontransfer area, an area contained within the transfer area but ignored during the actual state RAM transfer. Placing registers in the nontransfer area is one way to reduce scan time because the Primary controller to CHS transfer time is shorter. With Concept 2.5, a new function called Section Transfer Control has been added which can be used to reduce scan time. See Section Transfer Control, p. 135 for further information on this feature.

Note: No matter how long your transfer takes, it does not cause a watchdog timeout.

840 USE 106 00 January 2003

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Schneider Electric 840 USE 106 0 manual State Ram Transfer and Scan Time