Texas Instruments TMS320C6454 warranty Static Powerdown Reset Enable Progress Disabled Enabled

Models: TMS320C6454

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PRODUCT PREVIEW

TMS320C6454

Fixed-Point Digital Signal Processor

www.ti.com

SPRS311A –APRIL 2006 –REVISED DECEMBER 2006

Following device reset, all peripherals that are not in the static powerdown state are in the disabled state by default. Peripherals used for boot such as HPI and PCI are enabled automatically following a device reset.

Peripherals are only allowed certain transitions between states (see Figure 3-1).

Static

Powerdown

Reset

Enable In

Progress

Disabled

Enabled

Figure 3-1. Peripheral Transitions Between States

Figure 3-2shows the flow needed to change the state of a given peripheral on the C6454 device.

Unlock the PERCFG0 register by

using the PERLOCK register.

Write to the PERCFG0 register within 16 SYSCLK3 clock cycles

to change the state of the

peripherals.

Poll the PERSTAT registers to

verify state change.

Figure 3-2. Peripheral State Change Flow

A 32-bit key (value = 0x0F0A 0B00) must be written to the Peripheral Lock register (PERLOCK) in order to allow access to the PERCFG0 register. Writes to the PERCFG1 register can be done directly without going through the PERLOCK register.

NOTE

The instructions that write to the PERLOCK and PERCFG0 registers must be in the same fetch packet if code is being executed from external memory. If the instructions are in different fetch packets, fetching the second instruction from external memory may stall the instruction long enough such that PERCFG0 register will be locked before the instruction is executed.

54

Device Configuration

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Texas Instruments TMS320C6454 warranty Static Powerdown Reset Enable Progress Disabled Enabled