Texas Instruments TMS320C6454 Device Status Register Description, Sysclkout MCBSP1EN PCI66

TMS320C6454

Fixed-Point Digital Signal Processor

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SPRS311A –APRIL 2006 –REVISED DECEMBER 2006

3.5 Device Status Register Description

The device status register depicts the device configuration selected upon device reset. Once set, these bits will remain set until a device reset. For the actual register bit names and their associated bit field descriptions, see Figure 3-10and Table 3-13.

Note that enabling or disabling peripherals through the Peripheral Configuration Registers (PERCFG0 and PERCFG1) does not affect the DEVSTAT register. To determine the status of peripherals following writes to the PERCFG0 and PERCFG1 registers, read the Peripherals Status Registers (PERSTAT0 and PERSTAT1).

31									24
					Reserved
					R-0000 0000
23			22	21	20	19	18	17	16
Reserved			EMIFA_EN	DDR2_EN	PCI_EN	CFGGP2	CFGGP1	CFGGP0	Reserved
R-0			R-x	R-x	R-x	R-x	R-x	R-x	R-1
15			14	13	12	11	10	9	8
SYSCLKOUT_		MCBSP1_EN		PCI66	Reserved	PCI_EEAI	MAC_SEL1	MAC_SEL0	Reserved
EN
R-x			R-x	R-x	R-0	R-x	R-x	R-x	R-1
7			6	5	4	3	2	1	0
Reserved			LENDIAN	HPI_WIDTH	AECLKINSEL	BOOTMODE3	BOOTMODE2	BOOTMODE1	BOOTMODE0
R-0			R-x	R-x	R-x	R-x	R-x	R-x	R-x
LEGEND: R/W = Read/Write; R = Read only; -x= value after reset
			Figure 3-10. Device Status Register (DEVSTAT) - 0x02A8 0000
			Table 3-13. Device Status Register (DEVSTAT) Field Descriptions
Bit	Field		Value	Description
31:23	Reserved			Reserved. Read-only, writes have no effect.
22	EMIFA_EN			EMIFA Enable (EMIFA_EN) status bit
				Shows the status of whether the EMIFA peripheral pins are enabled/disabled.
			0	EMIFA peripheral pins are disabled (default)
			1	EMIFA peripheral pins are enabled
21	DDR2_EN			DDR2 Memory Controller Enable (DDR2_EN) status bit
				Shows the status of whether the DDR2 Memory Controller peripheral pins are enabled/disabled.
			0	DDR2 Memory Controller peripheral pins are disabled (default)
			1	DDR2 Memory Controller peripheral pins are enabled
20	PCI_EN			PCI Enable (PCI_EN) status bit
				Shows the status of which function is enabled on the HPI/PCI multiplexed pins.
			0	HPI pin functions are enabled (default)
			1	PCI pin functions are enabled
19:17	CFGGP[2:0]			Used as General-Purpose inputs for configuration purposes.
				These pins are latched at reset. These values can be used by S/W routines for boot operations.
16	Reserved			Reserved. Read-only, writes have no effect.
15	SYSCLKOUT_EN			SYSCLKOUT Enable (SYSCLKOUT_EN) status bit
				Shows the status of which function is enabled on the SYSCLK4/GP[1] muxed pin.
			0	GP[1] pin function of the SYSCLK4/GP[1] pin enabled (default)
			1	SYSCLK4 pin function of the SYSCLK4/GP[1] pin enabled

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