Texas Instruments TMS320C6454 warranty Signal Name, Type 1 IPD/IPU 2DESCRIPTION, AEA6, AEA3

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SIGNAL
NAME	NO.
AEA10/MACSEL1	M25
AEA9/MACSEL0	M27
AEA8/PCI_EEAI	P25
AEA7	N27
AEA6/PCI66	U27
AEA5/MCBSP1_EN	U28
AEA4/	T28
SYSCLKOUT_EN
AEA3	T27
AEA2/CFGGP2	T26
AEA1/CFGGP1	U26

AEA0/CFGGP0U25

TMS320C6454

Fixed-Point Digital Signal Processor

SPRS311A –APRIL 2006 –REVISED DECEMBER 2006

Table 2-3. Terminal Functions (continued)

TYPE (1) IPD/IPU (2)DESCRIPTION

∙ EMAC/MDIO interface select bits (MACSEL[1:0])

There are two configuration pins — MACSEL[1:0] — to select the EMAC/MDIO interface.

AEA[10:9]: MACSEL[1:0]

00 - 10/100 EMAC/MDIO MII Mode Interface (default)

01 - 10/100 EMAC/MDIO RMII Mode Interface

10 - 10/100/1000 EMAC/MDIO GMII Mode Interface

11 - 10/100/1000 with RGMII Mode Interface

[RGMII interface requires a 1.8 V or 1.5 V I/O supply]

∙PCI I2C EEPROM Auto-Initialization (PCI_EEAI)

AEA8: PCI auto-initialization via external I2C EEPROM

If the PCI peripheral is disabled (PCI_EN pin = 0), this pin must not be pulled up.

0 - PCI auto-initialization through I2C EEPROM is disabled (default).

1 - PCI auto-initialization through I2C EEPROM is enabled.

∙PCI Frequency Selection (PCI66)

[The PCI peripheral needs be enabled (PCI_EN = 1) to use this function] Selects the PCI operating frequency of 66 MHz or 33 MHz PCI operating frequency is selected at reset via the pullup/pulldown resistor on the PCI66 pin:

AEA6:

O/Z IPD 0 - PCI operates at 33 MHz (default). 1 - PCI operates at 66 MHz.

Note: If the PCI peripheral is disabled (PCI_EN = 0), this pin must not be pulled up.

∙McBSP1 Enable bit (MCBSP1_EN)

Selects which function is enabled on the McBSP1/GPIO muxed pins AEA5:

0- GPIO pin functions enabled (default).

1- McBSP1 pin functions enabled.

∙SYSCLKOUT Enable bit (SYSCLKOUT_EN)

Selects which function is enabled on the SYSCLK4/GP[1] muxed pin AEA4:

0- GP[1] pin function of the SYSCLK4/GP[1] pin enabled (default).

1- SYSCLK4 pin function of the SYSCLK4/GP[1] pin enabled.

∙Configuration GPI (CFGGP[2:0]) (AEA[2:0])

These pins are latched during reset and their values are shown in the DEVSTAT register. These values can be used by software routines for boot operations.

AEA3:

For proper C6454 device operation, the AEA3 pin must be pulled down to VSS with a 1-kΩresistor at device reset.

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