PRODUCT PREVIEW

TMS320C6454

Fixed-Point Digital Signal Processor

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SPRS311A –APRIL 2006 –REVISED DECEMBER 2006

Table 3-13. Device Status Register (DEVSTAT) Field Descriptions (continued)

Bit

Field

Value

Description

14

MCBSP1_EN

 

McBSP1 Enable (MCBSP1_EN) status bit

 

 

 

Shows the status of which function is enabled on the McBSP1/GPIO muxed pins.

 

 

0

GPIO pin functions enabled (default)

 

 

1

McBSP1 pin functions enabled

13

PCI66

 

PCI Frequency Selection (PCI66) status bit

 

 

 

Shows the PCI operating frequency selected at reset.

 

 

0

PCI operates at 33 MHz (default)

 

 

1

PCI operates at 66 MHz

12

Reserved

 

Reserved. Read-only, writes have no effect.

11

PCI_EEAI

 

PCI I2C EEPROM Auto-Initialization (PCI_EEAI) status bit

 

 

 

Shows whether the PCI auto-initialization via external I2C EEPROM is enabled/disabled.

 

 

0

PCI auto-initialization through external I2C EEPROM is disabled; the PCI peripheral uses the

 

 

 

specified PCI default values (default).

 

 

1

PCI auto-initialization through external I2C EEPROM is enabled; the PCI peripheral is configured

 

 

 

through external I2C EEPROM provided the PCI peripheral pin is enabled (PCI_EN = 1).

10:9

MACSEL[1:0]

 

EMAC Interface Select (MACSEL[1:0]) status bits

 

 

 

Shows which EMAC interface mode has been selected.

 

 

00

10/100 EMAC/MDIO with MII Interface (default)

 

 

01

10/100 EMAC/MDIO with RMII Interface

 

 

10

10/100/1000 EMAC/MDIO with GMII Interface

 

 

11

10/100/1000 EMAC/MDIO with RGMII Mode Interface

 

 

 

[RGMII interface requires a 1.8 V or 1.5 V I/O supply]

8:7

Reserved

 

Reserved. Read-only, writes have no effect.

6

LENDIAN

 

Device Endian mode (LENDIAN)

 

 

 

Shows the status of whether the system is operating in Big Endian mode or Little Endian mode

 

 

 

(default).

 

 

0

System is operating in Big Endian mode

 

 

1

System is operating in Little Endian mode (default)

5

HPI_WIDTH

 

HPI bus width control bit.

 

 

 

Shows the status of whether the HPI bus operates in 32-bit mode or in 16-bit mode (default).

 

 

0

HPI operates in 16-bit mode. (default)

 

 

1

HPI operates in 32-bit mode

4

AECLKINSEL

 

EMIFA input clock select

 

 

 

Shows the status of what clock mode is enabled or disabled for EMIFA.

 

 

0

AECLKIN (default mode)

 

 

1

SYSCLK4 (CPU/x) Clock Rate. The SYSCLK4 clock rate is software selectable via the PLL1

 

 

 

Controller. By default, SYSCLK4 is selected as CPU/8 clock rate.

66

Device Configuration

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Texas Instruments TMS320C6454 warranty Bit Field Value Description, Pcieeai, MACSEL10, Lendian