TMS320C6454

Fixed-Point Digital Signal Processor

SPRS311A –APRIL 2006 –REVISED DECEMBER 2006

2.6 Signal Groups Description

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CLKIN1

 

Clock/PLL1

 

SYSCLK4/GP[1](A)

 

 

and

 

 

 

PLLV1

 

PLL Controller

 

 

 

 

CLKIN2

Reset and Interrupts

RESETSTAT RESET NMI

POR

PLLV2

Clock/PLL2

RSV02

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TMS

 

TDO

 

TDI

 

TCK

 

TRST

 

EMU0

IEEE Standard

1149.1

EMU1

(JTAG)

Emulation

 

 

EMU14

 

EMU15

 

EMU16

 

EMU17

 

EMU18

 

Reserved

Peripheral

Enable/Disable

RSV03

RSV04

RSV05

RSV06

RSV07

RSV76

RSV77

RSV78

PCI_EN

Control/Status

A.This pin functions as GP[1] by default. For more details, see the Device Configuration section of this document.

Figure 2-6. CPU and Peripheral Signals

18

Device Overview

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Texas Instruments TMS320C6454 warranty Signal Groups Description