Index | Agilent Technologies E1439 guide

Index

Numerics

70 MHZ IF input 212 9821, using with 42

A

ac coupling, selecting 141 ADC, circuit description 215 address, module

See logical address Agilent E9821, using with 42 alias filter

See anti-alias filter alias protection

See anti-alias filter analog filter

See anti-alias filter analog input

See input 212 anti-alias filter

circuit description 214 default 30 described 30 selecting 120, 141 using 30

append fiber mode 50 appending data on local bus 148 arbitration bus, DTB 209

arm state, described 23 auto-ranging 137 autozero 134

B

backplane connections 209 bandwidth

control circuit description 215 filter selection 120

baseband range,fixed 137

baseband input 212 baseband measurements

complex 128 overview 30

block

mode, explained 23 size, determining 91

block diagram analog input 212 circuit description 211

clock and sync 31 functional overview 20

BOF 44

buffer amplifier, selecting 143 bus transfers, data 42

C

Cprogramming overview 21 source library 22

cables

fiber optic 6 calibration data, reading 75 center frequency

See Also frequency setting 128

circuit description 211 cleaning

fiber optic connectors 6 clock

ADC source 72 circuit description 213 distribution 32 divider 73

easy setup 78 external reference 34 external sample 40, 104 external sample frequency 76 external sample setups 37, 83 front panel, selecting 131 generation 213

resetting 77 setup 31 sharing 32, 78, 213 source, specifying 72 sync source 178 synchronization 40, 78

closing an instrument session 86 complex data output, specifying 91 configuring a VXI system 13 continuous mode, explained 23 control registers, circuit description 217 conversion, range 138

copy fiber mode 46 corrections, dc offset 134 coupling, input 141 CRC 44

229

Image 239

Agilent Technologies E1439 manual Index

Contents

Agilent Technologies Part Number E1439-90005 Trademarks E1438 E1439 Agilent E1439 at a Glance Documentation What You Get With the Agilent E1439Hardware Software Other Documentation This BookPage Contents Contents Replacing Assemblies Contents Installing the Agilent E1439 To inspect the Agilent E1439 To inspect the Agilent E1439 To install the Agilent E1439 To install the Agilent E1439 Logical Address VXI Mainframe To clean fiber optic connectors To clean fiber optic connectors To store the module To store the moduleTo transport the module To transport the module Getting Started with the Agilent E1439 Getting Started and Introduction Getting Started and Introduction System Requirements Microsoft Windows System RequirementsSystem Requirements Updating firmware To install the Windows VXIplug&play driversTo install the Windows VXIplug&play drivers To use the Resource Manager To use the Resource Manager To use the program group Windows To use the program group Windows To use the VXIplug&play Soft Front Panel SFP To use the VXIplug&play Soft Front Panel SFP To use the example programs To use the example programs Interrupt.exe Multchan32.exeInfo.exe Getting Started with the Agilent E1439 Using the Agilent E1439 Agilent E1439 overview Agilent E1439 overview Windows framework Programming the Agilent E1439Programming the Agilent E1439 Programming Measurement loop Measurement loop Measurement loop in multi-module systems Delay and phase in triggered measurements Delay and phase in triggered measurements Triggerdelayactual=0 or 0/16=0 output samples Using the Agilent E1439 Magnitude trigger and magdwell time Magnitude trigger and magdwell time Using the Agilent E1439 Frequency and filtering Frequency and filtering Using clock and sync Using clock and sync Clock distribution Sharing Reference and Sync signals in multi-module systemsManaging multiple modules Managing multiple modules Using the Agilent E1439 Managing multi-module systems Systems using front panel distribution Managing multi-mainframe systems Slot0 Controller Slave on Using an external sample clock Splitter External sample clock Synchronous center frequency changes Synchronizing changes in multi-module systemsSynchronous digital filter changes External sample synchronization in multi-module systems Trigger and phase in multi-module systems Sync the digital local oscillators Now you may take a measurement Issue an age1439measstart Transferring data Transferring data Fiber Optic Interface Fiber Optic Interface EOE Sync with Data Fiber Frame Fiber FramesData Frame Normal Data Fiber Frame BOF Sync Without Data Fiber Frame Off Fiber Interface SetupFiber Modes Copy Raw Generate Fiber Receiver Append Fiber Receiver Flow Control Copy No Copy2 Agilent E1439 Programmers Reference Introduction Introduction Component Capability Subclass Function Name Functions listed by classFunctions listed by class Component Capability Subclass Function Name Route Configure Route Configure LOW Level Age1439interruptrestore on Functions listed by functional group Functions listed by functional group Initializing and closing Debugging Agilent E1439 Programmers Reference Identification Trigger Synchronization controlling multiple modules Functions listed alphabetically Functions listed alphabetically Age1439driverdebuglevelget on page 97 −gets the debug level Agilent E1439 Programmers Reference Agilent E1439 Programmers Reference Agilent E1439 Programmers Reference Age1439adcclock Description Age1439adcdividerAdcDivider AdcDividerPtr Age1439adcdividerget Description Age1439attribget DatestampPtr Age1439calgetBoard ViStatus age1439clockfsgetViSession id, ViPReal64 fsPtr Age1439clockfsAge1439clockfsget ViStatus age1439clockfsViSession id, ViReal64 fs Age1439clockrecover Age1439clocksetupget Age1439clocksetupClockSetup Internal reference Simple clock setups for stand-alone modulesPhase locked to external reference Front master, internal reference Front panel master-slave setups, one master per mainframe AGE1439FRNTREARMSTREXTREF Front slave, phase locked to master Rear master, internal reference Rear panel master-slave setups, one master per mainframeRear master, phase locked to external reference AGE1439REARSLAVEXTREF Front sync, external sample clock, wired-OR sync Send sync to slave Multiple mainframe setups Effect on Active Measurement ClockSetupPtrFunctions listed alphabetically Receive sync from master Example AGE1439SUCCESS indicates that a function was successful Age1439closeViStatus age1439closeViSession id Interpolate Age1439combosetupPhase Blocksize Age1439datamemsizeget Age1439datascaleget Age1439datasetup BlocksizePtr DataDelayDataDelayPtr Data type Mode ResolutionResolutionPtr DataTypePtr Port Xfers Sequence FilterBW Xfersize XfersizePtr Age1439dataxfersize DebugLevel DebugLevelPtr Age1439driverdebuglevel EpochGenerate Age1439epochsetup HeaderValue HeaderEnableHeaderEnablePtr EpochSizePtr Append Option/fiberMode Off 101 ErrorMessage Age1439errormessage ErrorCode ErrorMessage Age1439errorquery Age1439extsamplesyncget SyncEnable SyncEnablePtrAge1439extsamplesync 105 Parameter Age1439fiberclearViStatus age1439fiberclearViSession id Description ViStatus age1439fibererrorclearViSession id Age1439fibererrorclear Definition Numeric Description Value Age1439fibererrorget 109 LedRegPtr Age1439fiberLEDget Pio1 Pio2 Dir Nrdy Age1439fiberrcvsignalsget BofEnable Age1439fibersetup BofEnablePtr crcEnable CrcEnablePtr fiberMode TransferRatePtr FibermodePtrFlowControlMode TransferRate FiberSignalPtr Age1439fibersignalget VerifyPath Sec Age1439fiberverify ViStatus age1439fiberxmtBOFViSession id Age1439fiberxmtBOF Age1439fiberxmtsignals Age1439fiberxmtsignalsget DecimatePtr Age1439filtersetupDecimate Invalid parameter combinations SigBwPtrBe set 25 dB 15 dB Comment Age1439filtersyncViStatus age1439filtersyncViSession id Description 124 Comments Age1439frequencycenterraw 126 Age1439frequencycenterrawcompute CenterFreqPtr Age1439frequencysetupAge1439frequencycenter sets the center frequency CenterFreq SyncPtr CmplxDCPtrSync 130 Age1439frontpanelclockinputget Age1439frontpanelclockinputFpClock FpClockPtr IdQuery Age1439init 133 ViStatus age1439inputautozeroViSession id Description Age1439inputautozero Age1439inputoffset ViStatus age1439inputoffsetsaveViSession id Age1439inputoffsetsave Age1439inputrangeauto Full Scale Voltage Vp Age1439inputrangeconvertVariable Range Index Full Scale DBm 140 AntiAlias Age1439inputsetup Range CouplingPtr SignalPathPtr SignalSignalPtr SignalPath 144 ViStatus age1439interruptrestoreViSession id Age1439interruptrestore Mask Age1439interruptsetup 147 Pipeline Age1439lbusmode LbusModePtr LbusResetPtr Age1439lbusresetViStatus age1439lbusresetViSession id, ViInt16 lbusReset LbusReset Idle Sync Age1439meascontrol This function performs the following sequence 153 ViStatus age1439measinitViSession id Description Age1439measinit Age1439measstart BlockReady Age1439measstatusgetDefinition ReadValid Options Age1439optionsget ProductId Age1439productidget Checks for AGE1439STATUSREADBLOCK and AGE1439STATUS Age1439read Read or age1439read64 function is this DataSampleCount OverloadPtr 161 WordCount Age1439readraw Call age1439measstart Call age1439readraw 164 Age1439referenceclockget Age1439referenceclockRefClock RefClockPtr Age1439referenceprescalerget Age1439referenceprescalerRefPrescaler RefPrescalerPtr ViStatus age1439resetViSession id Description Age1439reset ViStatus age1439resethardViSession id Age1439resethard DriverRev InstrRev Age1439revisionquery Message ErrorAge1439selftest TestMessage TestResult 171 Age1439serialnumberget Age1439serialnumberSerialNum Age1439smbclockoutputget Age1439smbclockoutputSmbClock SmbClockPtr ViStatus age1439staterecallViSession id Age1439staterecallAge1439staterecall #include age1439.h ViStatus age1439statesaveViSession id Description Age1439statesaveAge1439statesave Status Bit Definition Age1439statusget AGE1439STATUSREADVALID Status Bit Definition Description Age1439syncclockget Age1439syncclockSyncClock SyncClockPtr Age1439syncdirectionget Age1439syncdirectionSyncDirection SyncDirectionPtr Age1439syncoutputget Age1439syncoutputSyncOutput SyncOutputPtr ActualDelayPtr Age1439triggerdelayactualget ActualPhasePtr Age1439triggerphaseactualget Age1439triggersetup Pre-trigger Bit realPost trigger MagDwellPtr Frequencysetup functionGenTrigPtr MagDwell TrigTypePtr Age1439vcxoget Age1439vcxoVcxoState VcxoStatePtr Age1439vxiclockoutputget Age1439vxiclockoutputVxiClock VxiClockPtr Age1439wait Variable Name Numeric Value Equivalent numeric values for variablesEquivalent numeric values for variables 191 192 193 194 195 196 197 Age1439selftest age1439staterecall Commands which halt active measurementsCommands which halt active measurements Parameter Description Error messagesError messages 200 Default values Default values Function VXIplug&play Syntax Quick Reference VXIplug&play Syntax Quick Reference Sage DacPtr 206 Module Description Front Panel Description Front Panel Description VXI backplane connections VXI backplane connections Trigger Lines Block diagram and description Block diagram and description Input Clock Generation DAC AC DC Anti-alias Filter Memory Controller and Sdram Memory Sampling ADCZoom and Decimation Filtering Fiber Optic Interface Data Output Control Registers Trigger Detection 218 Replacing Assemblies Ordering Information Replaceable partsReplaceable parts Mfr. No Mfr. Name Location Code Numbers Assemblies Installing to avoid damage Number Replaceable parts Ref Des Agilent Part Qty DescriptionPart Number To remove the top cover To remove the M1, M2 assemblies 226 Front panel data port Agilent Technologies Sales OfficeFiber frame that acts as a synchronizing event Fiber frame that contains the last 4 data bytes in an epoch 228 Index Index Raw data, scaling 231 VME VXI 234 Need Assistance? About this edition