Manuals / Agilent Technologies / Computer Equipment / Network Card

Agilent Technologies manual Using the Agilent E1439

Models: E1439

1 246

Download 246 pages 11.5 Kb

Page 29

3

Using the Agilent E1439

Image 29

Agilent Technologies manual Using the Agilent E1439

Contents

Agilent Technologies Part Number E1439-90005 Trademarks E1438 E1439 Agilent E1439 at a GlanceHardware What You Get With the Agilent E1439Software DocumentationOther Documentation This BookPage Contents Contents Replacing Assemblies Contents Installing the Agilent E1439 To inspect the Agilent E1439 To inspect the Agilent E1439To install the Agilent E1439 To install the Agilent E1439Logical Address VXI Mainframe To clean fiber optic connectors To clean fiber optic connectorsTo store the module To store the moduleTo transport the module To transport the module Getting Started with the Agilent E1439 Getting Started and Introduction Getting Started and IntroductionSystem Requirements Microsoft Windows System RequirementsSystem Requirements Updating firmware To install the Windows VXIplug&play driversTo install the Windows VXIplug&play drivers To use the Resource Manager To use the Resource ManagerTo use the program group Windows To use the program group WindowsTo use the VXIplug&play Soft Front Panel SFP To use the VXIplug&play Soft Front Panel SFPTo use the example programs To use the example programsInterrupt.exe Multchan32.exeInfo.exe Getting Started with the Agilent E1439 Using the Agilent E1439 Agilent E1439 overview Agilent E1439 overviewWindows framework Programming the Agilent E1439Programming the Agilent E1439 Programming Measurement loop Measurement loopMeasurement loop in multi-module systems Delay and phase in triggered measurements Delay and phase in triggered measurementsTriggerdelayactual=0 or 0/16=0 output samples Using the Agilent E1439 Magnitude trigger and magdwell time Magnitude trigger and magdwell timeUsing the Agilent E1439 Frequency and filtering Frequency and filteringUsing clock and sync Using clock and syncManaging multiple modules Sharing Reference and Sync signals in multi-module systemsManaging multiple modules Clock distributionUsing the Agilent E1439 Managing multi-module systems Systems using front panel distributionManaging multi-mainframe systems Slot0 ControllerSlave on Using an external sample clock Splitter External sample clock Synchronous center frequency changes Synchronizing changes in multi-module systemsSynchronous digital filter changes External sample synchronization in multi-module systems Trigger and phase in multi-module systemsSync the digital local oscillators Now you may take a measurement Issue an age1439measstartTransferring data Transferring dataFiber Optic Interface Fiber Optic InterfaceData Frame Normal Data Fiber Frame Fiber FramesBOF Sync Without Data Fiber Frame EOE Sync with Data Fiber FrameOff Fiber Interface SetupFiber Modes Copy Raw Generate Fiber Receiver Append Fiber Receiver Flow Control Copy No Copy2 Agilent E1439 Programmers Reference Introduction IntroductionComponent Capability Subclass Function Name Functions listed by classFunctions listed by class Component Capability Subclass Function Name Route Configure Route Configure LOW Level Age1439interruptrestore on Functions listed by functional group Functions listed by functional groupInitializing and closing Debugging Agilent E1439 Programmers Reference Identification Trigger Synchronization controlling multiple modules Functions listed alphabetically Functions listed alphabeticallyAge1439driverdebuglevelget on page 97 −gets the debug level Agilent E1439 Programmers Reference Agilent E1439 Programmers Reference Agilent E1439 Programmers Reference Age1439adcclock AdcDivider AdcDividerPtr Age1439adcdividerAge1439adcdividerget DescriptionDescription Age1439attribgetDatestampPtr Age1439calgetBoard Age1439clockfsget Age1439clockfsViStatus age1439clockfsViSession id, ViReal64 fs ViStatus age1439clockfsgetViSession id, ViPReal64 fsPtrAge1439clockrecover Age1439clocksetupget Age1439clocksetupClockSetup Internal reference Simple clock setups for stand-alone modulesPhase locked to external reference Front master, internal reference Front panel master-slave setups, one master per mainframeAGE1439FRNTREARMSTREXTREF Front slave, phase locked to masterRear master, internal reference Rear panel master-slave setups, one master per mainframeRear master, phase locked to external reference AGE1439REARSLAVEXTREF Front sync, external sample clock, wired-OR syncSend sync to slave Multiple mainframe setupsFunctions listed alphabetically Receive sync from master ClockSetupPtrExample Effect on Active MeasurementAGE1439SUCCESS indicates that a function was successful Age1439closeViStatus age1439closeViSession id Phase Age1439combosetupBlocksize InterpolateAge1439datamemsizeget Age1439datascaleget Age1439datasetup DataDelayPtr DataDelayData type BlocksizePtrResolutionPtr ResolutionDataTypePtr ModePort Xfers Sequence FilterBW Xfersize XfersizePtr Age1439dataxfersizeDebugLevel DebugLevelPtr Age1439driverdebuglevelEpochGenerate Age1439epochsetupHeaderEnablePtr HeaderEnableEpochSizePtr HeaderValueAppend Option/fiberMode Off101 ErrorMessage Age1439errormessageErrorCode ErrorMessage Age1439errorqueryAge1439extsamplesyncget SyncEnable SyncEnablePtrAge1439extsamplesync 105 Parameter Age1439fiberclearViStatus age1439fiberclearViSession id Description ViStatus age1439fibererrorclearViSession id Age1439fibererrorclearDefinition Numeric Description Value Age1439fibererrorget109 LedRegPtr Age1439fiberLEDgetPio1 Pio2 Dir Nrdy Age1439fiberrcvsignalsgetBofEnable Age1439fibersetupBofEnablePtr crcEnable CrcEnablePtr fiberMode FlowControlMode FibermodePtrTransferRate TransferRatePtrFiberSignalPtr Age1439fibersignalgetVerifyPath Sec Age1439fiberverifyViStatus age1439fiberxmtBOFViSession id Age1439fiberxmtBOFAge1439fiberxmtsignals Age1439fiberxmtsignalsget DecimatePtr Age1439filtersetupDecimate Invalid parameter combinations SigBwPtrBe set 25 dB 15 dB Comment Age1439filtersyncViStatus age1439filtersyncViSession id Description 124 Comments Age1439frequencycenterraw126 Age1439frequencycenterrawcompute Age1439frequencycenter sets the center frequency Age1439frequencysetupCenterFreq CenterFreqPtrSyncPtr CmplxDCPtrSync 130 Age1439frontpanelclockinputget Age1439frontpanelclockinputFpClock FpClockPtr IdQuery Age1439init133 ViStatus age1439inputautozeroViSession id Description Age1439inputautozeroAge1439inputoffset ViStatus age1439inputoffsetsaveViSession id Age1439inputoffsetsaveAge1439inputrangeauto Full Scale Voltage Vp Age1439inputrangeconvertVariable Range Index Full Scale DBm 140 AntiAlias Age1439inputsetupRange CouplingPtrSignalPtr SignalSignalPath SignalPathPtr144 ViStatus age1439interruptrestoreViSession id Age1439interruptrestoreMask Age1439interruptsetup147 Pipeline Age1439lbusmodeLbusModePtr ViStatus age1439lbusresetViSession id, ViInt16 lbusReset Age1439lbusresetLbusReset LbusResetPtrIdle Sync Age1439meascontrolThis function performs the following sequence 153 ViStatus age1439measinitViSession id Description Age1439measinitAge1439measstart Definition Age1439measstatusgetReadValid BlockReadyOptions Age1439optionsgetProductId Age1439productidgetChecks for AGE1439STATUSREADBLOCK and AGE1439STATUS Age1439readSampleCount DataOverloadPtr Read or age1439read64 function is this161 WordCount Age1439readrawCall age1439measstart Call age1439readraw 164 Age1439referenceclockget Age1439referenceclockRefClock RefClockPtr Age1439referenceprescalerget Age1439referenceprescalerRefPrescaler RefPrescalerPtr ViStatus age1439resetViSession id Description Age1439resetViStatus age1439resethardViSession id Age1439resethardDriverRev InstrRev Age1439revisionqueryAge1439selftest ErrorTestMessage TestResult Message171 Age1439serialnumberget Age1439serialnumberSerialNum Age1439smbclockoutputget Age1439smbclockoutputSmbClock SmbClockPtr Age1439staterecall Age1439staterecall#include age1439.h ViStatus age1439staterecallViSession idViStatus age1439statesaveViSession id Description Age1439statesaveAge1439statesave Status Bit Definition Age1439statusgetAGE1439STATUSREADVALID Status Bit Definition DescriptionAge1439syncclockget Age1439syncclockSyncClock SyncClockPtr Age1439syncdirectionget Age1439syncdirectionSyncDirection SyncDirectionPtr Age1439syncoutputget Age1439syncoutputSyncOutput SyncOutputPtr ActualDelayPtr Age1439triggerdelayactualgetActualPhasePtr Age1439triggerphaseactualgetAge1439triggersetup Pre-trigger Bit realPost trigger GenTrigPtr Frequencysetup functionMagDwell MagDwellPtrTrigTypePtr Age1439vcxoget Age1439vcxoVcxoState VcxoStatePtr Age1439vxiclockoutputget Age1439vxiclockoutputVxiClock VxiClockPtr Age1439wait Variable Name Numeric Value Equivalent numeric values for variablesEquivalent numeric values for variables 191 192 193 194 195 196 197 Age1439selftest age1439staterecall Commands which halt active measurementsCommands which halt active measurements Parameter Description Error messagesError messages 200 Default values Default valuesFunction VXIplug&play Syntax Quick Reference VXIplug&play Syntax Quick ReferenceSage DacPtr 206 Module Description Front Panel Description Front Panel DescriptionVXI backplane connections VXI backplane connectionsTrigger Lines Block diagram and description Block diagram and descriptionInput Clock Generation DAC AC DCAnti-alias Filter Memory Controller and Sdram Memory Sampling ADCZoom and Decimation Filtering Fiber Optic Interface Data OutputControl Registers Trigger Detection218 Replacing Assemblies Ordering Information Replaceable partsReplaceable parts Mfr. No Mfr. Name Location Code NumbersAssemblies Installing to avoid damageNumber Replaceable parts Ref Des Agilent Part Qty DescriptionPart Number To remove the top cover To remove the M1, M2 assemblies 226 Fiber frame that acts as a synchronizing event Agilent Technologies Sales OfficeFiber frame that contains the last 4 data bytes in an epoch Front panel data port228 Index Index Raw data, scaling 231 VME VXI 234 Need Assistance? About this edition