Agilent Technologies Part Number E1439-90005
Trademarks
E1438 E1439
Agilent E1439 at a Glance
Hardware
What You Get With the Agilent E1439
Software
Documentation
Other Documentation
This Book
Page
Contents
Contents
Replacing Assemblies
Contents
Installing the Agilent E1439
To inspect the Agilent E1439
To inspect the Agilent E1439
To install the Agilent E1439
To install the Agilent E1439
Logical Address
VXI Mainframe
To clean fiber optic connectors
To clean fiber optic connectors
To store the module
To transport the module
To store the module
To transport the module
Getting Started with the Agilent E1439
Getting Started and Introduction
Getting Started and Introduction
System Requirements
System Requirements
System Requirements Microsoft Windows
To install the Windows VXIplug&play drivers
To install the Windows VXIplug&play drivers
Updating firmware
To use the Resource Manager
To use the Resource Manager
To use the program group Windows
To use the program group Windows
To use the VXIplug&play Soft Front Panel SFP
To use the VXIplug&play Soft Front Panel SFP
To use the example programs
To use the example programs
Multchan32.exe
Info.exe
Interrupt.exe
Getting Started with the Agilent E1439
Using the Agilent E1439
Agilent E1439 overview
Agilent E1439 overview
Programming the Agilent E1439
Programming the Agilent E1439
Windows framework
Programming
Measurement loop
Measurement loop
Measurement loop in multi-module systems
Delay and phase in triggered measurements
Delay and phase in triggered measurements
Triggerdelayactual=0 or 0/16=0 output samples
Using the Agilent E1439
Magnitude trigger and magdwell time
Magnitude trigger and magdwell time
Using the Agilent E1439
Frequency and filtering
Frequency and filtering
Using clock and sync
Using clock and sync
Managing multiple modules
Sharing Reference and Sync signals in multi-module systems
Managing multiple modules
Clock distribution
Using the Agilent E1439
Managing multi-module systems
Systems using front panel distribution
Managing multi-mainframe systems
Slot0 Controller
Slave on
Using an external sample clock
Splitter External sample clock
Synchronizing changes in multi-module systems
Synchronous digital filter changes
Synchronous center frequency changes
External sample synchronization in multi-module systems
Trigger and phase in multi-module systems
Sync the digital local oscillators
Now you may take a measurement Issue an age1439measstart
Transferring data
Transferring data
Fiber Optic Interface
Fiber Optic Interface
Data Frame Normal Data Fiber Frame
Fiber Frames
BOF Sync Without Data Fiber Frame
EOE Sync with Data Fiber Frame
Fiber Interface Setup
Fiber Modes
Off
Copy
Raw
Generate
Fiber Receiver
Append
Fiber Receiver
Flow Control Copy No Copy2
Agilent E1439 Programmers Reference
Introduction
Introduction
Functions listed by class
Functions listed by class
Component Capability Subclass Function Name
Component Capability Subclass Function Name
Route Configure
Route Configure LOW Level
Age1439interruptrestore on
Functions listed by functional group
Functions listed by functional group
Initializing and closing
Debugging
Agilent E1439 Programmers Reference
Identification
Trigger
Synchronization controlling multiple modules
Functions listed alphabetically
Functions listed alphabetically
Age1439driverdebuglevelget on page 97 −gets the debug level
Agilent E1439 Programmers Reference
Agilent E1439 Programmers Reference
Agilent E1439 Programmers Reference
Age1439adcclock
AdcDivider AdcDividerPtr
Age1439adcdivider
Age1439adcdividerget
Description
Description
Age1439attribget
Age1439calget
Board
DatestampPtr
Age1439clockfsget
Age1439clockfs
ViStatus age1439clockfsViSession id, ViReal64 fs
ViStatus age1439clockfsgetViSession id, ViPReal64 fsPtr
Age1439clockrecover
Age1439clocksetup
ClockSetup
Age1439clocksetupget
Simple clock setups for stand-alone modules
Phase locked to external reference
Internal reference
Front master, internal reference
Front panel master-slave setups, one master per mainframe
AGE1439FRNTREARMSTREXTREF
Front slave, phase locked to master
Rear panel master-slave setups, one master per mainframe
Rear master, phase locked to external reference
Rear master, internal reference
AGE1439REARSLAVEXTREF
Front sync, external sample clock, wired-OR sync
Send sync to slave
Multiple mainframe setups
Functions listed alphabetically Receive sync from master
ClockSetupPtr
Example
Effect on Active Measurement
Age1439close
ViStatus age1439closeViSession id
AGE1439SUCCESS indicates that a function was successful
Phase
Age1439combosetup
Blocksize
Interpolate
Age1439datamemsizeget
Age1439datascaleget
Age1439datasetup
DataDelayPtr
DataDelay
Data type
BlocksizePtr
ResolutionPtr
Resolution
DataTypePtr
Mode
Port
Xfers Sequence
FilterBW
Xfersize XfersizePtr
Age1439dataxfersize
DebugLevel DebugLevelPtr
Age1439driverdebuglevel
EpochGenerate
Age1439epochsetup
HeaderEnablePtr
HeaderEnable
EpochSizePtr
HeaderValue
Append
Option/fiberMode Off
101
ErrorMessage
Age1439errormessage
ErrorCode ErrorMessage
Age1439errorquery
SyncEnable SyncEnablePtr
Age1439extsamplesync
Age1439extsamplesyncget
105
Age1439fiberclear
ViStatus age1439fiberclearViSession id Description
Parameter
ViStatus age1439fibererrorclearViSession id
Age1439fibererrorclear
Definition Numeric Description Value
Age1439fibererrorget
109
LedRegPtr
Age1439fiberLEDget
Pio1 Pio2 Dir Nrdy
Age1439fiberrcvsignalsget
BofEnable
Age1439fibersetup
BofEnablePtr crcEnable CrcEnablePtr fiberMode
FlowControlMode
FibermodePtr
TransferRate
TransferRatePtr
FiberSignalPtr
Age1439fibersignalget
VerifyPath Sec
Age1439fiberverify
ViStatus age1439fiberxmtBOFViSession id
Age1439fiberxmtBOF
Age1439fiberxmtsignals
Age1439fiberxmtsignalsget
Age1439filtersetup
Decimate
DecimatePtr
SigBwPtr
Be set
Invalid parameter combinations
25 dB 15 dB
Age1439filtersync
ViStatus age1439filtersyncViSession id Description
Comment
124
Comments
Age1439frequencycenterraw
126
Age1439frequencycenterrawcompute
Age1439frequencycenter sets the center frequency
Age1439frequencysetup
CenterFreq
CenterFreqPtr
CmplxDCPtr
Sync
SyncPtr
130
Age1439frontpanelclockinput
FpClock FpClockPtr
Age1439frontpanelclockinputget
IdQuery
Age1439init
133
ViStatus age1439inputautozeroViSession id Description
Age1439inputautozero
Age1439inputoffset
ViStatus age1439inputoffsetsaveViSession id
Age1439inputoffsetsave
Age1439inputrangeauto
Age1439inputrangeconvert
Variable Range Index
Full Scale Voltage Vp
Full Scale DBm
140
AntiAlias
Age1439inputsetup
Range
CouplingPtr
SignalPtr
Signal
SignalPath
SignalPathPtr
144
ViStatus age1439interruptrestoreViSession id
Age1439interruptrestore
Mask
Age1439interruptsetup
147
Pipeline
Age1439lbusmode
LbusModePtr
ViStatus age1439lbusresetViSession id, ViInt16 lbusReset
Age1439lbusreset
LbusReset
LbusResetPtr
Idle Sync
Age1439meascontrol
This function performs the following sequence
153
ViStatus age1439measinitViSession id Description
Age1439measinit
Age1439measstart
Definition
Age1439measstatusget
ReadValid
BlockReady
Options
Age1439optionsget
ProductId
Age1439productidget
Checks for AGE1439STATUSREADBLOCK and AGE1439STATUS
Age1439read
SampleCount
Data
OverloadPtr
Read or age1439read64 function is this
161
WordCount
Age1439readraw
Call age1439measstart Call age1439readraw
164
Age1439referenceclock
RefClock RefClockPtr
Age1439referenceclockget
Age1439referenceprescaler
RefPrescaler RefPrescalerPtr
Age1439referenceprescalerget
ViStatus age1439resetViSession id Description
Age1439reset
ViStatus age1439resethardViSession id
Age1439resethard
DriverRev InstrRev
Age1439revisionquery
Age1439selftest
Error
TestMessage TestResult
Message
171
Age1439serialnumber
SerialNum
Age1439serialnumberget
Age1439smbclockoutput
SmbClock SmbClockPtr
Age1439smbclockoutputget
Age1439staterecall
Age1439staterecall
#include age1439.h
ViStatus age1439staterecallViSession id
Age1439statesave
Age1439statesave
ViStatus age1439statesaveViSession id Description
Status Bit Definition
Age1439statusget
AGE1439STATUSREADVALID
Status Bit Definition Description
Age1439syncclock
SyncClock SyncClockPtr
Age1439syncclockget
Age1439syncdirection
SyncDirection SyncDirectionPtr
Age1439syncdirectionget
Age1439syncoutput
SyncOutput SyncOutputPtr
Age1439syncoutputget
ActualDelayPtr
Age1439triggerdelayactualget
ActualPhasePtr
Age1439triggerphaseactualget
Age1439triggersetup
Bit real
Post trigger
Pre-trigger
GenTrigPtr
Frequencysetup function
MagDwell
MagDwellPtr
TrigTypePtr
Age1439vcxo
VcxoState VcxoStatePtr
Age1439vcxoget
Age1439vxiclockoutput
VxiClock VxiClockPtr
Age1439vxiclockoutputget
Age1439wait
Equivalent numeric values for variables
Equivalent numeric values for variables
Variable Name Numeric Value
191
192
193
194
195
196
197
Commands which halt active measurements
Commands which halt active measurements
Age1439selftest age1439staterecall
Error messages
Error messages
Parameter Description
200
Default values
Default values
Function
VXIplug&play Syntax Quick Reference
VXIplug&play Syntax Quick Reference
Sage
DacPtr
206
Module Description
Front Panel Description
Front Panel Description
VXI backplane connections
VXI backplane connections
Trigger Lines
Block diagram and description
Block diagram and description
Input
Clock Generation
DAC AC DC
Anti-alias Filter
Sampling ADC
Zoom and Decimation Filtering
Memory Controller and Sdram Memory
Fiber Optic Interface
Data Output
Control Registers
Trigger Detection
218
Replacing Assemblies
Replaceable parts
Replaceable parts
Ordering Information
Mfr. No Mfr. Name Location
Code Numbers
Assemblies
Installing to avoid damage
Replaceable parts Ref Des Agilent Part Qty Description
Part Number
Number
To remove the top cover
To remove the M1, M2 assemblies
226
Fiber frame that acts as a synchronizing event
Agilent Technologies Sales Office
Fiber frame that contains the last 4 data bytes in an epoch
Front panel data port
228
Index
Index
Raw data, scaling 231
VME
VXI
234
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