Agilent E1439 Programmers Reference | Agilent Technologies specs

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Agilent E1439 Programmer's Reference

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Agilent Technologies manual Agilent E1439 Programmers Reference

Contents

Agilent Technologies Part Number E1439-90005 Trademarks E1438 E1439 Agilent E1439 at a Glance Documentation What You Get With the Agilent E1439Hardware Software Other Documentation This BookPage Contents Contents Replacing Assemblies Contents Installing the Agilent E1439 To inspect the Agilent E1439 To inspect the Agilent E1439 To install the Agilent E1439 To install the Agilent E1439 Logical Address VXI Mainframe To clean fiber optic connectors To clean fiber optic connectors To store the module To transport the moduleTo store the module To transport the module Getting Started with the Agilent E1439 Getting Started and Introduction Getting Started and Introduction System Requirements System RequirementsSystem Requirements Microsoft Windows To install the Windows VXIplug&play drivers To install the Windows VXIplug&play driversUpdating firmware To use the Resource Manager To use the Resource Manager To use the program group Windows To use the program group Windows To use the VXIplug&play Soft Front Panel SFP To use the VXIplug&play Soft Front Panel SFP To use the example programs To use the example programs Multchan32.exe Info.exeInterrupt.exe Getting Started with the Agilent E1439 Using the Agilent E1439 Agilent E1439 overview Agilent E1439 overview Programming the Agilent E1439 Programming the Agilent E1439Windows framework Programming Measurement loop Measurement loop Measurement loop in multi-module systems Delay and phase in triggered measurements Delay and phase in triggered measurements Triggerdelayactual=0 or 0/16=0 output samples Using the Agilent E1439 Magnitude trigger and magdwell time Magnitude trigger and magdwell time Using the Agilent E1439 Frequency and filtering Frequency and filtering Using clock and sync Using clock and sync Clock distribution Sharing Reference and Sync signals in multi-module systemsManaging multiple modules Managing multiple modules Using the Agilent E1439 Managing multi-module systems Systems using front panel distribution Managing multi-mainframe systems Slot0 Controller Slave on Using an external sample clock Splitter External sample clock Synchronizing changes in multi-module systems Synchronous digital filter changesSynchronous center frequency changes External sample synchronization in multi-module systems Trigger and phase in multi-module systems Sync the digital local oscillators Now you may take a measurement Issue an age1439measstart Transferring data Transferring data Fiber Optic Interface Fiber Optic Interface EOE Sync with Data Fiber Frame Fiber FramesData Frame Normal Data Fiber Frame BOF Sync Without Data Fiber Frame Fiber Interface Setup Fiber ModesOff Copy Raw Generate Fiber Receiver Append Fiber Receiver Flow Control Copy No Copy2 Agilent E1439 Programmers Reference Introduction Introduction Functions listed by class Functions listed by classComponent Capability Subclass Function Name Component Capability Subclass Function Name Route Configure Route Configure LOW Level Age1439interruptrestore on Functions listed by functional group Functions listed by functional group Initializing and closing Debugging Agilent E1439 Programmers Reference Identification Trigger Synchronization controlling multiple modules Functions listed alphabetically Functions listed alphabetically Age1439driverdebuglevelget on page 97 −gets the debug level Agilent E1439 Programmers Reference Agilent E1439 Programmers Reference Agilent E1439 Programmers Reference Age1439adcclock Description Age1439adcdividerAdcDivider AdcDividerPtr Age1439adcdividerget Description Age1439attribget Age1439calget BoardDatestampPtr ViStatus age1439clockfsgetViSession id, ViPReal64 fsPtr Age1439clockfsAge1439clockfsget ViStatus age1439clockfsViSession id, ViReal64 fs Age1439clockrecover Age1439clocksetup ClockSetupAge1439clocksetupget Simple clock setups for stand-alone modules Phase locked to external referenceInternal reference Front master, internal reference Front panel master-slave setups, one master per mainframe AGE1439FRNTREARMSTREXTREF Front slave, phase locked to master Rear panel master-slave setups, one master per mainframe Rear master, phase locked to external referenceRear master, internal reference AGE1439REARSLAVEXTREF Front sync, external sample clock, wired-OR sync Send sync to slave Multiple mainframe setups Effect on Active Measurement ClockSetupPtrFunctions listed alphabetically Receive sync from master Example Age1439close ViStatus age1439closeViSession idAGE1439SUCCESS indicates that a function was successful Interpolate Age1439combosetupPhase Blocksize Age1439datamemsizeget Age1439datascaleget Age1439datasetup BlocksizePtr DataDelayDataDelayPtr Data type Mode ResolutionResolutionPtr DataTypePtr Port Xfers Sequence FilterBW Xfersize XfersizePtr Age1439dataxfersize DebugLevel DebugLevelPtr Age1439driverdebuglevel EpochGenerate Age1439epochsetup HeaderValue HeaderEnableHeaderEnablePtr EpochSizePtr Append Option/fiberMode Off 101 ErrorMessage Age1439errormessage ErrorCode ErrorMessage Age1439errorquery SyncEnable SyncEnablePtr Age1439extsamplesyncAge1439extsamplesyncget 105 Age1439fiberclear ViStatus age1439fiberclearViSession id DescriptionParameter ViStatus age1439fibererrorclearViSession id Age1439fibererrorclear Definition Numeric Description Value Age1439fibererrorget 109 LedRegPtr Age1439fiberLEDget Pio1 Pio2 Dir Nrdy Age1439fiberrcvsignalsget BofEnable Age1439fibersetup BofEnablePtr crcEnable CrcEnablePtr fiberMode TransferRatePtr FibermodePtrFlowControlMode TransferRate FiberSignalPtr Age1439fibersignalget VerifyPath Sec Age1439fiberverify ViStatus age1439fiberxmtBOFViSession id Age1439fiberxmtBOF Age1439fiberxmtsignals Age1439fiberxmtsignalsget Age1439filtersetup DecimateDecimatePtr SigBwPtr Be setInvalid parameter combinations 25 dB 15 dB Age1439filtersync ViStatus age1439filtersyncViSession id DescriptionComment 124 Comments Age1439frequencycenterraw 126 Age1439frequencycenterrawcompute CenterFreqPtr Age1439frequencysetupAge1439frequencycenter sets the center frequency CenterFreq CmplxDCPtr SyncSyncPtr 130 Age1439frontpanelclockinput FpClock FpClockPtrAge1439frontpanelclockinputget IdQuery Age1439init 133 ViStatus age1439inputautozeroViSession id Description Age1439inputautozero Age1439inputoffset ViStatus age1439inputoffsetsaveViSession id Age1439inputoffsetsave Age1439inputrangeauto Age1439inputrangeconvert Variable Range IndexFull Scale Voltage Vp Full Scale DBm 140 AntiAlias Age1439inputsetup Range CouplingPtr SignalPathPtr SignalSignalPtr SignalPath 144 ViStatus age1439interruptrestoreViSession id Age1439interruptrestore Mask Age1439interruptsetup 147 Pipeline Age1439lbusmode LbusModePtr LbusResetPtr Age1439lbusresetViStatus age1439lbusresetViSession id, ViInt16 lbusReset LbusReset Idle Sync Age1439meascontrol This function performs the following sequence 153 ViStatus age1439measinitViSession id Description Age1439measinit Age1439measstart BlockReady Age1439measstatusgetDefinition ReadValid Options Age1439optionsget ProductId Age1439productidget Checks for AGE1439STATUSREADBLOCK and AGE1439STATUS Age1439read Read or age1439read64 function is this DataSampleCount OverloadPtr 161 WordCount Age1439readraw Call age1439measstart Call age1439readraw 164 Age1439referenceclock RefClock RefClockPtrAge1439referenceclockget Age1439referenceprescaler RefPrescaler RefPrescalerPtrAge1439referenceprescalerget ViStatus age1439resetViSession id Description Age1439reset ViStatus age1439resethardViSession id Age1439resethard DriverRev InstrRev Age1439revisionquery Message ErrorAge1439selftest TestMessage TestResult 171 Age1439serialnumber SerialNumAge1439serialnumberget Age1439smbclockoutput SmbClock SmbClockPtrAge1439smbclockoutputget ViStatus age1439staterecallViSession id Age1439staterecallAge1439staterecall #include age1439.h Age1439statesave Age1439statesaveViStatus age1439statesaveViSession id Description Status Bit Definition Age1439statusget AGE1439STATUSREADVALID Status Bit Definition Description Age1439syncclock SyncClock SyncClockPtrAge1439syncclockget Age1439syncdirection SyncDirection SyncDirectionPtrAge1439syncdirectionget Age1439syncoutput SyncOutput SyncOutputPtrAge1439syncoutputget ActualDelayPtr Age1439triggerdelayactualget ActualPhasePtr Age1439triggerphaseactualget Age1439triggersetup Bit real Post triggerPre-trigger MagDwellPtr Frequencysetup functionGenTrigPtr MagDwell TrigTypePtr Age1439vcxo VcxoState VcxoStatePtrAge1439vcxoget Age1439vxiclockoutput VxiClock VxiClockPtrAge1439vxiclockoutputget Age1439wait Equivalent numeric values for variables Equivalent numeric values for variablesVariable Name Numeric Value 191 192 193 194 195 196 197 Commands which halt active measurements Commands which halt active measurementsAge1439selftest age1439staterecall Error messages Error messagesParameter Description 200 Default values Default values Function VXIplug&play Syntax Quick Reference VXIplug&play Syntax Quick Reference Sage DacPtr 206 Module Description Front Panel Description Front Panel Description VXI backplane connections VXI backplane connections Trigger Lines Block diagram and description Block diagram and description Input Clock Generation DAC AC DC Anti-alias Filter Sampling ADC Zoom and Decimation FilteringMemory Controller and Sdram Memory Fiber Optic Interface Data Output Control Registers Trigger Detection 218 Replacing Assemblies Replaceable parts Replaceable partsOrdering Information Mfr. No Mfr. Name Location Code Numbers Assemblies Installing to avoid damage Replaceable parts Ref Des Agilent Part Qty Description Part NumberNumber To remove the top cover To remove the M1, M2 assemblies 226 Front panel data port Agilent Technologies Sales OfficeFiber frame that acts as a synchronizing event Fiber frame that contains the last 4 data bytes in an epoch 228 Index Index Raw data, scaling 231 VME VXI 234 Need Assistance? About this edition