AMD Am186TMER, Am188TMER user manual Processor Status Flags Register, Bits 15-12 -Reserved

Figure 2-1 Register Set

16-Bit

Register Name

Byte AX

Addressable DX

(8-Bit

Register CX

Names BX

Shown)

BP

SI

DI

SP

7	0	7	0
	AH		AL
	DH		DL
	CH		CL

BH BL

Base Pointer

Source Index

Destination Index

150

General

Registers

Special Register	16-Bit
Functions	Register Name		0
		15
Multiply/Divide	CS	Code Segment
I/O Instructions	DS	Data Segment
Loop/Shift/Repeat/Count SS
		Stack Segment
Base Registers	ES	Extra Segment
		Segment Registers
Index Registers		15	0
	FLAGS	Processor Status Flags
Stack Pointer	IP	Instruction Pointer

Status and Control

Registers

2.1.1Processor Status Flags Register

The 16-bit processor Status Flags Register (Figure 2-2)records specific characteristics of the result of logical and arithmetic instructions (bits 0, 2, 4, 6, 7, and 11) and controls the operation of the microcontroller within a given operating mode (bits 8, 9, and 10).

After an instruction is executed, the value of the flags may be set (to 1), cleared/reset (set to 0), unchanged, or undefined. The term undefined means that the flag value prior to the execution of the instruction is not preserved, and the value of the flag after the instruction is executed cannot be predicted.

Figure 2-2 Processor Status Flags Register (FLAGS)

15 7 0

Reserved

OF

DF

IF TF SF

ZF

AF PF CF

Res Res Res

Bits 15–12 —Reserved

Bit 11: Overflow Flag (OF)—Set if the signed result cannot be expressed within the number of bits in the destination operand; cleared otherwise.

Bit 10: Direction Flag (DF)—Causes string instructions to auto-decrement the appropriate index registers when set. Clearing DF causes auto-increment.

2-2 Programming