Offset

 

 

(Hexadecimal)

Register Name

 

ω

 

ω

7A

 

PIO Data 1 Register

 

78

 

PIO Direction 1 Register

 

76

 

PIO Mode 1 Register

Chapter 13

74

 

PIO Data 0 Register

 

 

72

 

PIO Direction 0 Register

 

70

 

PIO Mode 0 Register

 

ω

 

ω

66

 

Timer 2 Mode/Control Register

 

62

 

Timer 2 Maxcount Compare A Register

 

60

 

Timer 2 Count Register

 

5E

 

Timer 1 Mode/Control Register

 

5C

 

Timer 1 Maxcount Compare B Register

 

5A

 

Timer 1 Maxcount Compare A Register

Chapter 9

58

 

Timer 1 Count Register

 

56

 

Timer 0 Mode/Control Register

 

54

 

Timer 0 Maxcount Compare B Register

 

52

 

Timer 0 Maxcount Compare A Register

 

50

 

Timer 0 Count Register

 

ω

 

ω

44

 

Serial Port Interrupt Control Register

 

42

 

Watchdog Timer Control Register

 

40

 

INT4 Control Register

 

3E

 

INT3 Control Register

 

3C

 

INT2 Control Register

 

3A

 

INT1 Control Register

 

38

 

INT0 Control Register

 

36

 

DMA 1 Interrupt Control Register

 

34

 

DMA 0 Interrupt Control Register

 

32

 

Timer Interrupt Control Register

Chapter 8

30

 

Interrupt Status Register

 

2E

 

Interrupt Request Register

 

2C

 

In-service Register

 

2A

 

Priority Mask Register

 

28

 

Interrupt Mask Register

 

26

 

Poll Status Register

 

24

 

Poll Register

 

22

 

End-of-Interrupt Register

 

20

 

Interrupt Vector Register

 

18

 

Synchronous Serial Receive Register

 

16

 

Synchronous Serial Transmit 0 Register

 

14

 

Synchronous Serial Transmit 1 Register

Chapter 12

12

 

Synchronous Serial Enable Register

 

10

 

Synchronous Serial Status Register

 

Notes:

Gaps in offset addresses indicate reserved registers.

Changed from 80C186 microcontroller.

Peripheral Control Block

4-3

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AMD Am188TMER, Am186TMER user manual Timer 1 Count Register