Vector Floating-point Programming
ARM DUI 0068B Copyright © 2000, 2001 ARM Limited. All r ights reserved. 6-15
6.7 VFP instructions
This section contains the following subsections:
•FABS, FCPY, and FNEG on page6-16
Floating-point absolute value, copy, and negate.
•FADD and FSUB on page6-18
Floating-point add and subtract.
•FCMP on page6-19
Floating-point co mpare.
•FCVTDS on page 6-20
Convert single-precision floating-point to double-precision.
•FCVTSD on page 6-21
Convert double-precision floating-point to single-precision.
•FDIV on page 6-22
Floating-point divide.
•FLD and FST on page 6-23
Floating-point load and store.
•FLDM and FSTM on page6-25
Floating-point load multiple and store multiple.
•FMAC, FNMAC, FMSC, and FNMSC on page6-27
Floating-point multiply accumulate instructions.
•FMDRR and FMRRD on page6-29
Transfer contents between ARM registers and a double-precision floating-point
register.
•FMRRS and FMSRR on page6-32
Transfer contents between a single-precision floating-point register and an ARM
register.
•FMRX, FMXR, and FMSTAT on page 6-33
Transfer contents between an ARM register and a VFP system register.
•FMUL and FNMUL on page6-34
Floating-point multiply and negate-multiply.
•FSITO and FUITO on page 6-35
Convert signed integer to floating-point and unsigned integer to floating-point.
•FSQRT on page 6-36
Floating-point square root.
•FTOSI and FTOUI on page6-37
Convert floating-point to signed integer and floating-point to unsigned integer.