ARM VERSION 1.2 manual 5 PLD, Is the register on which the memory address is based

ARM Instruction Reference

4.2.5PLD

Cache preload.

Syntax

PLD [Rn{, FlexOffset}]

where:

Rn is the register on which the memory address is based.

FlexOffset is an optional flexible offset applied to the value in Rn.

FlexOffset can be either of the following:

#expr

{-}Rm{, shift}

where:
-	is an optional minus sign. If - is present, the offset is subtracted
	from Rn. Otherwise, the offset is added to Rn.
expr	is an expression evaluating to an integer in the range –4095 to
	+4095. This is often a numeric constant.
Rm	is a register containing a value to be used as the offset.
shift	is an optional shift to be applied to Rm. It can be any one of:
ASR n
		arithmetic shift right n bits. 1 ≤ n ≤ 32.
LSL n
		logical shift left n bits. 0 ≤ n ≤ 31.
LSR n
		logical shift right n bits. 1 ≤ n ≤ 32.
ROR n
		rotate right n bits. 1 ≤ n ≤ 31.
	RRX	rotate right one bit, with extend.

This is the same offset syntax as for LDR and STR, words and unsigned bytes on page 4-7.

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