ARM VERSION 1.2

Writing ARM and Thumb Assembly Language

2.8.1 ARM LDM and STM instructions

The load (or store) m ultiple instruction loads (stores) any su bset of the 16

general-purpose registers from (to) memory, using a single instruction.

Syntax

The syntax of the

LDM

instructions is:

LDM{cond}address-mode Rn{!},reg-list{^}

where:

cond

is an optional condition code. Refer to Conditional execution on

page2-20 for more information.

address-mode

specifies the addressing mode of the instruction. Refer to LDM and STM

addressing modes on page2-41 for details.

is the base register for the load operation. The address stored in this

(pc) as the base register.

specifies base regis ter write back. If this is specified, the address in the

base register is updated after the transfer. It is decremented or

incremented by one wor d for each register in t he register list.

is a comma-delimited list of symbolic register names and register ranges

enclosed in braces. There must be at least one register in the list. Register

ranges are specified w ith a dash. For exampl e:

{r0,r1,r4-r6,pc}

Do not specify writeback if the base register

is in

You must not use this option in User or System mode. For details of its

use in privileged modes, see the Handling Processor Exceptions chapter

in ADS Developer Guide and LDM and STM on page 4-18.

The syntax of the

STM

instruction corresponds exactly, except for some details in the

effect of the

option.