Vector Floating-point Programming
6-16 Copyright © 2000, 2001 ARM Limited. A ll rights reserved. ARM DUI 0068B
6.7.1 FABS, FCPY, and FNEG
Floating-point copy, absolute value, and negate.
These instructi ons can be scalar, ve ctor, or mixed (see Vector and scalar operations on
page6-7).
Syntax
<op><precision>{cond} Fd, Fm
where:
<op>
must be one of
FCPY
,
FABS
, or
FNEG
.
<precision>
must be either
S
for single-precision, or
D
for double-precision.
cond
is an optional condition code (see VFP and condition codes on
page6-8).
Fd
is the VFP register for the resul t.
Fm
is the VFP register holding the operand.
The precision of
Fd
and
Fm
must match the precision specified in
<precision>
.
Usage
The
FCPY
instruction copies the contents of
Fm
into
Fd
.
The
FABS
instruction takes the contents of
Fm
, clears the sign bit, and places the result in
Fd
. This gives the abso lute value.
The
FNEG
instruction takes the contents of
Fm
, changes the sign bit, and places the result
in
Fd
. This gives the negation of the value.
If the operand is a NaN, the sign bi t is determined in each case as above , but no
exception is produced.
Exceptions
None of these instructions can produce any exceptions.