ARM Instruction Reference
ARM DUI 0068B Copyright © 2000, 2001 ARM Limited. All r ights reserved. 4-69
4.7.6 LDC2, STC2
Transfer data between memory and coprocessor, alternative instructi ons.
Syntax
These instructions have three p ossible forms:
•zero offset
•pre-indexed offset
•post-indexed offset.
The syntax of the three forms, in the same order, are:
op coproc, CRd, [Rn]
op coproc, CRd, [Rn, #{-}offset]{!}
op coproc, CRd, [Rn], #{-}offset
where:
op
is either
LDC2
or
STC2
.
coproc
is the name of the coprocessor the instruction is for. The standard name
is
pn
, where
n
is an integer in the range 0- 15.
CRd
is the coprocessor register to lo ad or save.
Rn
is the register on which the memory address is based. If r15 is specified,
the value used is the address of the current instruction plus eight.
-
is an optional minus sign. If
-
is present, the offset is subtracted from
Rn
.
Otherwise, the offset is added to
Rn
.
offset
is an expression evaluating to a multiple of 4, in the range 0-1020.
!
is an optional suffix. If ! is present, the address including the offset is
written back into
Rn
.
Usage
The use of this instruction depends on the coprocessor. See the coprocessor
documentation for details.
Note
LDC2
and
STC2
are always unconditional.