ARM Instruction Reference

4.9.2ADRL ARM pseudo-instruction

Load a program-relative or register-relative address into a register. It is similar to the ADR pseudo-instruction. ADRL can load a wider range of addresses than ADR because it generates two data processing instructions.

Note

ADRL is not available when assembling Thumb instructions. Use it only in ARM code.

Syntax

ADR{cond}L register,expr where:

cond

is an optional condition code.

register

is the register to load.

expr

is a program-relative or register-relative expression that evaluates to:

 

a non word-aligned address within 64KB

 

a word-aligned address within 256KB.

More distant addresses can be used if the alignment is 16 bytes or more.

The address can be either before or after the address of the instruction or the base register (see Register-relative and program-relative expressions on page 3-23).

Note

For program-relative expressions, the given range is relative to a point two words after the address of the current instruction.

Usage

ADRL always assembles to two instructions. Even if the address can be reached in a single instruction, a second, redundant instruction is produced.

If the assembler cannot construct the address in two instructions, it generates an error message and the assembly fails. See LDR ARM pseudo-instructionon page 4-82 for information on loading a wider range of addresses (see also Loading constants into registers on page 2-25).

ADRL produces position-independent code, because the address is program-relative or register-relative.

4-80

Copyright © 2000, 2001 ARM Limited. All rights reserved.

ARM DUI 0068B

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ARM VERSION 1.2 manual Adrl ARM pseudo-instruction, Non word-aligned address within 64KB, Word-aligned address within 256KB