ARM VERSION 1.2 2.2 Overview of the ARM architecture

Writing ARM and Thumb Assembly Language

2.2 Overview of the ARM architecture

This section gives a brief overview of the ARM architecture.

ARM processors are typical of RISC processors in that they implement a load/store

architecture. Only load and store instructions can access memory. Data processing

instructions operate on register contents only.

2.2.1 Architecture versions

The information and examples in this book assume that you are using a processor that

implements ARM architecture v3 or above. See ARM Architecture Reference Manual

for details of the various architecture versions.

All these processors have a 32-bit addressing range.

2.2.2 ARM and Thumb state

ARM architecture versions v4T and above define a 16-bit instruction set called the

Thumb instruction set. The functionality of the Thumb instruction set is a subset of the

functionality of the 32-bit ARM instruction set. Refer to Thumb instruction set overview

on page2-9 for more information.

A processor that is executing Thumb instructions is operating in Thumb state. A

processor that is executing ARM instructions is operating in ARM state.

A processor in ARM state cannot execute Thumb instructions, and a processor in

Thumb state cannot execute ARM instructions. You must ensure that the processor

never receives instructions of the wrong instruction set for the current state.

Each instruction set includes instructions to change processor state.

You must also switch the assembler mode to produce the correct opcodes using

CODE16

and

CODE32

directives. Refer to CODE16 and CODE32 on page7-54 for details.

ARM processors always start executing code in ARM state.