ARM VERSION 1.2 manual Conditional execution, ALU status flags

Writing ARM and Thumb Assembly Language

2.5Conditional execution

In ARM state, each data processing instruction has an option to update ALU status flags in the Current Program Status Register (CPSR) according to the result of the operation.

Add an S suffix to an ARM data processing instruction to make it update the ALU status flags in the CPSR.

Do not use the S suffix with CMP, CMN, TST, or TEQ. These comparison instructions always update the flags. This is their only effect.

In Thumb state, there is no option. All data processing instructions update the ALU status flags in the CPSR, except when one or more high registers are used in MOV and ADD instructions. MOV and ADD cannot update the status flags in these cases.

Almost every ARM instruction can be executed conditionally on the state of the ALU status flags in the CPSR. Refer to Table 2-1 on page 2-21 for a list of the suffixes to add to instructions to make them conditional.

In ARM state, you can:

•update the ALU status flags in the CPSR on the result of a data operation

•execute several other data operations without updating the flags

•execute following instructions or not, according to the state of the flags updated in the first operation.

In Thumb state, most data operations always update the flags, and conditional execution can only be achieved using the conditional branch instruction (B). The suffixes for this instruction are the same as in ARM state. No other instruction can be conditional.

2.5.1The ALU status flags

The CPSR contains the following ALU status flags:

NSet when the result of the operation was Negative.

ZSet when the result of the operation was Zero.

CSet when the operation resulted in a Carry.

VSet when the operation caused oVerflow.

QARM architecture v5E only. Sticky flag (see The Q flag on page 4-5).

A carry occurs if the result of an addition is greater than or equal to 232, if the result of a subtraction is positive, or as the result of an inline barrel shifter operation in a move or logical instruction.

Overflow occurs if the result of an add, subtract, or compare is greater than or equal to 231, or less than –231.

2-20 Copyright © 2000, 2001 ARM Limited. All rights reserved. ARM DUI 0068B