The value in register Cf is presented to all the signatures simultaneously during matching.
Cf must have all the bits specified by si (in addition to matching mi) in order for the signature i to trigger. In other words, if the result of the logical “AND” of register Cf with si is
The ci value is the
In general for each signature i at time t:
If | ⎧ | t | t – 1 | t ⎫ | t | = | ci | ⎧ | t | = 0 | ⎫ | Equation 3 |
⎨mi | ∧ (si | & Cf | )= si ⎬, | then cpi | , else⎨cpi | ⎬ | ||||||
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Cft = ∑cpit |
| Cft – 1 | Equation 4 |
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where /\ is a logical “AND” operator, & is a bitwise AND, Sigma is a
Equation 3 states that if there is a match mi, and the
Equation 4 states that at each cycle, the register Cf is updated by the bitwise OR of all the cpi values of all the signatures, and a final bitwise OR with the previous state.
When a stateful flow is older than a timeout value, Cf
Packet Handling — the R Value
The constant ri is a flag that tells the hardware what to do with a packet that has been matched to signature i. The memory used to store the matched packets is divided into Temporary Memory and Match Memory. If a packet is stored in Match Memory, action is requested from the host to process the matched packet. If a packet is stored in Temporary Memory, no action is requested from the host, as this represents only a partial match.
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