Intel D15343-003 manual Hub Interface Signals

Intel® 854 Graphics Memory Controller Hub (GMCH)

SMAB[5,4,2,1]	O	Memory Address Copies: These signals are identical to SMA[5,4,2,1]
	SSTL_2	and are used to reduce loading for selective CPC(clock-per-command).
		These copies are not inverted.
SDM[8:0]	O	Data Mask: When activated during writes, the corresponding data
	SSTL_2	groups in the DDR SDRAM are masked. There is one SDM for every
		eight data lines. SDM can be sampled on both edges of the data
		strobes.
RCVENOUT#	O	Clock Output: Reserved, NC.
	SSTL_2
RCVENIN#	O	Clock Input: Reserved, NC.
	SSTL_2

3.3Hub Interface Signals

Table 7.	Hub Interface Signals
	Signal Name	Type	Description
	HL[10:0]	I/O Hub	Packet Data: Data signals used for HI read and write operations.
	HLSTB	I/O Hub	Packet Strobe: One of two differential strobe signals used to transmit or
			receive packet data over HI.
	HLSTB#	I/O Hub	Packet Strobe Complement: One of two differential strobe signals used
			to transmit or receive packet data over HI.

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