Intel D15343-003 manual Straps Read GFX Core, HPLLCC20, DVO Port CRT Port, Rate

Register Description

Table 24. Intel® 82854 GMCH Configurations and Some Resolution Examples: Native Graphics Mode

Straps Read			GFX Core
Through		System
HPLLCC[2:0]:	FSB		Clock(Low)
		Memory		DVO Port	CRT Port
D0:F3:Register	Rate		GFX Core
		Frequency
Offset C0-C1h,			Clock (High)
bits[2:0]
000	400	266 MHz	200 MHz	1600x1200@85 Hz	1600x1200@85-Hz
	MHz			DCLK = 229- MHz	DCLK = 229 -MHz
				2048x1536@72 Hz	2048x1536@75 Hz
				DCLK = 324 MHz	DCLK = 340 MHz
111	400	333 MHz	250 MHz	1600x1200@85 Hz	1600x1200@85 Hz
	MHz			DCLK = 229 MHz	DCLK = 229 MHz
				2048x1536@72 Hz	2048x1536@75 Hz
				DCLK = 324 MHz	DCLK = 340 MHz

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