Maxim DS21Q55 Hdlc Configuration, H1TC, H2TC, Hdlc #1 Transmit Control, Hdlc #2 Transmit Control

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22.2 HDLC Configuration

Basic configuration of the HDLC controllers is accomplished via the HxTC and HxRC registers. Operating features such as CRC generation, zero stuffer, transmit and receive HDLC mapping options, and idle flags are selected here. Also, the HDLC controllers are reset via these registers.

Register Name:	H1TC, H2TC
Register Description:	HDLC #1 Transmit Control, HDLC #2 Transmit Control
Register Address:	90h, A0h

Bit #

Name

Default

7	6	5	4	3	2	1	0
NOFS	TEOML	THR	THMS	TFS	TEOM	TZSD	TCRCD
0	0	0	0	0	0	0	0

Bit 0/Transmit CRC Defeat (TCRCD). A 2-byte CRC code is automatically appended to the outbound message. This bit can be used to disable the CRC function.

0 = enable CRC generation (normal operation)

1 = disable CRC generation

Bit 1/Transmit Zero Stuffer Defeat (TZSD). The zero stuffer function automatically inserts a zero in the message field (between the flags) after five consecutive ones to prevent the emulation of a flag or abort sequence by the data pattern. The receiver automatically removes (de-stuffs) any zero after five ones in the message field.

0 = enable the zero stuffer (normal operation)

1 = disable the zero stuffer

Bit 2/Transmit End of Message (TEOM). Should be set to a one just before the last data byte of an HDLC packet is written into the transmit FIFO at HxTF. If not disabled via TCRCD, the transmitter will automatically append a 2-byte CRC code to the end of the message.

Bit 3/Transmit Flag/Idle Select (TFS). This bit selects the inter-message fill character after the closing and before the opening flags (7Eh).

0 = 7Eh

1 = FFh

Bit 4/Transmit HDLC Mapping Select (THMS). 0 = transmit HDLC assigned to channels

1 = transmit HDLC assigned to FDL (T1 mode), Sa Bits (E1 mode)

Bit 5/Transmit HDLC Reset (THR). Will reset the transmit HDLC controller and flush the transmit FIFO. An abort followed by 7Eh or FFh flags/idle will be transmitted until a new packet is initiated by writing new data into the FIFO. Must be cleared and set again for a subsequent reset.

0 = normal operation

1 = reset transmit HDLC controller and flush the transmit FIFO

Bit 6/Transmit End of Message and Loop (TEOML). To loop on a message, should be set to a one just before the last data byte of an HDLC packet is written into the transmit FIFO. The message will repeat until the user clears this bit or a new message is written to the transmit FIFO. If the host clears the bit, the looping message will complete then flags will be transmitted until new message is written to the FIFO. If the host terminates the loop by writing a new message to the FIFO the loop will terminate, one or two flags will be transmitted and the new message will start. If not disabled via TCRCD, the transmitter will automatically append a 2-byte CRC code to the end of all messages. This is useful for transmitting consecutive SS7 FISUs without host intervention.

Bit 7/Number Of Flags Select (NOFS).

0 = send one flag between consecutive messages

1 = send two flags between consecutive messages

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information.