Maxim DS21Q55 specifications ESIB1, ESIB2, ESIB3, ESIB4

Product Preview								DS21Q55
Register Name:		ESIB1
Register Description:		Extended System Information Bus Register 1
Register Address:		B2h
Bit #	7	6	5	4	3	2	1	0
Name	DISn	DISn	DISn	DISn	DISn	DISn	DISn	DISn
Default	0	0	0	0	0	0	0	0

Bits 0 to 7/Device Interrupt Status (DISn). Causes all devices participating in the ESIB group to output their interrupt status on the appropriate data bus line selected by the ESIBSEL0 to ESIBSEL2 bits of the ESIBCR1 register.

Register Name:	ESIB2
Register Description:	Extended System Information Bus Register 2
Register Address:	B3h

Bit #

Name

Default

7	6	5	4	3	2	1	0
DRLOSn	DRLOSn	DRLOSn	DRLOSn	DRLOSn	DRLOSn	DRLOSn	DRLOSn
0	0	0	0	0	0	0	0

Bits 0 to 7/Device Receive Loss of Sync (DRLOSn). Causes all devices participating in the ESIB group to output their frame synchronization status on the appropriate data bus line selected by the ESIBSEL0 to ESIBSEL2 bits of the ESIBCR1 register.

Register Name:	ESIB3
Register Description:	Extended System Information Bus Register 3
Register Address:	B4h

Bit #

Name

Default

7	6	5	4	3	2	1	0
UST1n	UST1n	UST1n	UST1n	UST1n	UST1n	UST1n	UST1n
0	0	0	0	0	0	0	0

Bits 0 to 7/User-Selected Status 1 (UST1n). Causes all devices participating in the ESIB group to output status or alarms as selected by the ESI3SEL0 to ESI3SEL2 bits in the ESIBCR2 configuration register on the appropriate data bus line selected by the ESIBSEL0 to ESIBSEL2 bits of the ESIBCR2 register.

Register Name:	ESIB4
Register Description:	Extended System Information Bus Register 4
Register Address:	B5h

Bit #

Name

Default

7	6	5	4	3	2	1	0
UST2n	UST2n	UST2n	UST2n	UST2n	UST2n	UST2n	UST2n
0	0	0	0	0	0	0	0

Bits 0 to 7/User-Selected Status 2 (UST2n). Causes all devices participating in the ESIB group to output status or alarms as selected by the ESI4SEL0 to ESI4SEL2 bits in the ESIBCR2 configuration register on the appropriate data bus line selected by the ESIBSEL0 to ESIBSEL2 bits of the ESIBCR2 register.

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