Maxim DS21Q55 Fifo Information, Receive Packet Bytes Available, H1TFBA, H2TFBA, H1RPBA, H2RPBA

Product Preview DS21Q55

22.3.3 FIFO Information

The transmit FIFO buffer-available register indicates the number of bytes that can be written into the transmit FIFO. The count from this register informs the host as to how many bytes can be written into the transmit FIFO without overflowing the buffer.

Register Name:	H1TFBA, H2TFBA
Register Description:	HDLC # 1 Transmit FIFO Buffer Available
	HDLC # 2 Transmit FIFO Buffer Available
Register Address:	9Fh, Afh

Bit #

Name

Default

7	6	5	4	3	2	1	0
TFBA7	TFBA6	TFBA5	TFBA4	TFBA3	TFBA2	TFBA1	TFBA0
0	0	0	0	0	0	0	0

Bits 0 to 7/Transmit FIFO Bytes Available (TFBAO to TFBA7). TFBA0 is the LSB.

22.3.4 Receive Packet Bytes Available

The lower 7 bits of the receive packet bytes available register indicate the number of bytes (0 through

127)that can be read from the receive FIFO. The value indicated by this register (lower 7 bits) informs the host as to ho w many bytes can be read from the receive FIFO without going past the end of a message. This value will refer to one of four possibilities: the first part of a packet, the continuation of a packet, the last part of a packet, or a complete packet. After reading the number of bytes indicated by this register, the host then checks the HDLC information register for detailed message status.

If the value in the HxRPBA register refers to the beginning portion of a message or continuation of a message then the MSB of the HxRPBA register will return a value of 1. This indicates that the host can safely read the number of bytes returned by the lower 7 bits of the HxRPBA register but there is no need to check the information register since the packet has not yet terminated (successfully or otherwise).

Register Name:	H1RPBA, H2RPBA
Register Description:	HDLC # 1 Receive Packet Bytes Available
	HDLC # 2 Receive Packet Bytes Available
Register Address:	9Ch, Ach

Bit #

Name

Default

7	6	5	4	3	2	1	0
MS	RPBA6	RPBA5	RPBA4	RPBA3	RPBA2	RPBA1	RPBA0
0	0	0	0	0	0	0	0

Bits 0 to 6/Receive FIFO Packet Bytes Available Count (RPBA0 to RPBA6). RPBA0 is the LSB.

Bit 7/Message Status (MS).

0 = bytes indicated by RPBA0 through RPBA6 are the end of a message. Host must check the INFO5 or INFO6 register for details.

1 = bytes indicated by RPBA0 through RPBA6 are the beginning or continuation of a message. The host does not need to check the INFO5 or INFO6 register.

144 of 248 012103

Please contact telecom.support@dalsemi.com or search http://www.maxim-ic.com for updated

information.