Memory Maps
Table 6-3. Hawk PPC Register Values for Suggested Memory
Map (Continued)
Address | Register Name | Register Name |
|
|
|
FEFF 0050 | MSADD2 | 0000 0000 |
|
|
|
FEFF 0054 | MSOFF2 & MSATT2 | 0000 0000 |
|
|
|
FEFF 0058 | MSADD3 | 0000 0000 |
|
|
|
FEFF 005C | MSOFF3 & MSATT3 | 0000 0000 |
|
|
|
PCI Memory Map |
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Following a reset, the Hawk ASIC disables all PCI slave map decoders. | 6 |
The MVME5100 is fully capable of supporting both PREP and CHRP PCI
Memory Maps with RAM size limited to 2GB.
VME Memory Map
The MVME5100 is fully capable of supporting both the PREP and the
CHRP VME Memory Maps examples with RAM size limited to 2GB.
PCI Local Bus Memory Map
The PCI memory map is controlled by the MPU/PCI bus bridge controller portion of the Hawk ASIC and by the Universe PCI/VME bus bridge ASIC. The Hawk and Universe devices adjust system mapping to suit a given application via programmable map decoder registers.
No default PCI memory map exists. Resetting the system turns the PCI map decoders off, and they must be reprogrammed in software for the intended application.
For detailed PCI memory maps, including suggested CHRP- and PREP- compatible memory maps, refer to the
http://www.motorola.com/computer/literature |