Vpc | Motorola Single Board Computer, MVME5100 instruction

5

Pin Assignments

Table 5-13. VMEbus Connector P2 Pin Assignments

(PMC Mode) (Continued)

Pin	Row Z	Row A	Row B	Row C	Row D

14	GND	PMC1_28 (J14-28)	VD16	PMC1_27 (J14-27)	PMC2_21 (J24-21)

15	PMC2_23 (J24-23)	PMC1_30 (J14-30)	VD17	PMC1_29 (J14-29)	PMC2_22 (J24-22)

16	GND	PMC1_32 (J14-32)	VD18	PMC1_31 (J14-31)	PMC2_24 (J24-24)

17	PMC2_26 (J24-26)	PMC1_34 (J14-34)	VD19	PMC1_33 (J14-33)	PMC2_25 (J24-25)

18	GND	PMC1_36 (J14-36)	VD20	PMC1_35 (J14-35)	PMC2_27 (J24-27)

19	PMC2_29 (J24-29)	PMC1_38 (J14-38)	VD21	PMC1_37 (J14-37)	PMC2_28 (J24-28)

20	GND	PMC1_40 (J14-40)	VD22	PMC1_39 (J14-39)	PMC2_30 (J24-30)

21	PMC2_32 (J24-32)	PMC1_42 (J14-42)	VD23	PMC1_41 (J14-41)	PMC2_31 (J24-31)

22	GND	PMC1_44 (J14-44)	GND	PMC1_43 (J14-43)	PMC2_33 (J24-33)

23	PMC2_35 (J24-35)	PMC1_46 (J14-46)	VD24	PMC1_45 (J14-45)	PMC2_34 (J24-34)

24	GND	PMC1_48 (J14-48)	VD25	PMC1_47 (J14-47)	PMC2_36 (J24-36)

25	PMC2_38 (J24-38)	PMC1_50 (J14-50)	VD26	PMC1_49 (J14-49)	PMC2_37 (J24-37)

26	GND	PMC1_52 (J14-52)	VD27	PMC1_51 (J14-51)	PMC2_39 (J24-39)

27	PMC2_41 (J24-41)	PMC1_54 (J14-54)	VD28	PMC1_53 (J14-53)	PMC2_40 (J24-40)

28	GND	PMC1_56 (J14-56)	VD29	PMC1_55 (J14-55)	PMC2_42 (J24-42)

29	PMC2_44 (J24-44)	PMC1_58 (J14-58)	VD30	PMC1_57 (J14-57)	PMC2_43 (J24-43)

30	GND	PMC1_60 (J14-60)	VD31	PMC1_59 (J14-59)	PMC2_45 (J24-45)

31	PMC2_46 (J24-46)	PMC1_62 (J14-62)	GND	PMC1_61 (J14-61)	GND

32	GND	PMC1_64 (J14-64)	+5V	PMC1_63 (J14-63)	VPC

5-24	Computer Group Literature Center Web Site

Image 106

Motorola Single Board Computer, MVME5100 manual Vpc

Contents

Installation and Use Page Safety Summary Flammability CE Notice European Community Limited and Restricted Rights Legend Contents PPCBug Firmware Appendix a Appendix B List of Figures Xii List of Tables Xiv About This Manual Part Number Description MHz MPC750 Commercial Models IPMC761-001 Part Number DescriptionMVME761 Compatible I/O MVME761-001 Overview of Contents Summary of Changes Xviii Comments and Suggestions Conventions Used in This Manual Terminology Ctrl Getting Started IntroductionOverview and Equipment Requirements Unpacking Instructions Hardware Configuration Preparation Manually Configured Headers/Jumpers Jumper Description Setting Default Jumper Settings Scon Installation Considerations PMC/SBC 761/IPMC Mode Selection Preparation Installation Installation MVME5100LayoutFigure PMC Modules MVME5100 Installation and Removal From a VMEbus Chassis Primary PMCspan PMCspan-002 Installation on an MVME5100 Secondary PMCspan PMCspan-010 Installation on a PMCspan-002/MVME5100 MVME5100 Installation Hardware Preparation and Installation Reset Function Switches and IndicatorsABT/RST Switch Abort Function RST Indicator DS1 Status IndicatorsConnectors CPU Indicator DS2 10/100 Base T Ports System PowerupDebug Port Initialization Process Boot-Up Sequence Page PPCBug Firmware PPCBug Overview PPCBug Firmware Using PPCBug Implementation and Memory Requirements Hardware and Firmware Initialization Using PPCBug Default Settings Cnfg Configure Board Information Block ENV Set Environment Configuring the PPCBug Parameters Parameters that can be configured using ENV are Field Service Menu Enable Y/N = N? Auto-Initialize of Nvram Header Enable Y/N = Y? Select the identifier. Default = Auto Boot at powerup only Y/N = N? Auto Boot Abort Delay = 7? ROM Boot Direct Ending Address = FFFFFFFC? Default Starting Address is LED/Serial Startup Diagnostic Codes Configuring the VMEbus Interface PCI Slave Image 1 Control = C0820000? PCI Slave Image 3 Bound Address Register = B0000000? VMEbus Slave Image 1 Translation Offset = 00000000? Firmware Command Buffer Debugger Commands Standard CommandsCommand Description Cnfg IOI Nocm Diagnostics Time Diagnostic Test Groups Test Group DescriptionPage MVME5100 General Features Features SummaryFeature Specification Sdram Features Descriptions General MVME5100 Block Diagram Memory ProcessorSystem Memory Controller and PCI Host Bridge Flash Memory ECC Sdram Memory Input/Output Interfaces P2 Input/Output I/O ModesEthernet Interface VMEbus Interface Real-Time Clock & Nvram & Watchdog TimerTimers Asynchronous Communications Idsel Routing Page Summary Connector DescriptionJumper Description Jumper Settings Jumper Switches and Settings IPMC761 Connector Pin Assignments ConnectorsIPMC761 Connector J3 Pin Assignments Pin Assignment Memory Expansion Connector J8 Pin Assignments Memory Expansion Connector Pin Assignments CKD00 CKD01 CKD02 CKD03 CKD04 CKD05 CSC0L PCI Expansion Connector J25 Pin Assignments PCI Expansion Connector Pin Assignments +5V PCI Expansion Connector PCI Mezzanine Card PMC Connectors PMC Slot 1 Connector J11 Pin Assignments AD09 +5V PMC Slot 1 Connector J12 Pin Assignments PMC Slot 1 Connector J13 Pin Assignments AD47 AD46 AD45 PMC Slot 1 Connector J14 Pin Assignments PMC Slot 1 Connector J14 Pin Assignments PMC Slot 2 Connector J21 Pin Assignments 10. PMC Slot 2 Connector J22 Pin Assignments IDSEL2 11. PMC Slot 2 Connector J23 Pin Assignments 12. PMC Slot 2 Connector J24 Pin Assignments 12. PMC Slot 2 Connector J24 Pin Assignments 13. VMEbus Connector P2 Pin Assignments PMC Mode VMEbus Connectors P1 & P2 Pin Assignments PMC modePin Row Z Row a Row B Row C Row D VPC VMEbus P1 & P2 Connector Pin Assignments SBC Mode 14. VMEbus P2 Connector Pinouts with IPMC761 SBC Mode PRSTB# 15. VMEbus Connector P2 Pinout with IPMC712 TXD4 BaseT/100 BaseTx Connector Pin Assignments 16 BaseT/100 BaseTx Connector Pin Assignment 17. COM1 J19 Connector Pin Assignments COM1 and COM2 Connector Pin Assignments18. COM2 J5 Connector Pin Assignments Programming the MVME51xx Memory Maps Processor Address Size Definition Start End Default Processor Memory MapProcessor Bus Memory Map Not e Processor Memory Map Suggested Chrp Memory Map X000 F3FF Hawk PPC Register Values for Suggested Memory MapAddress Register Name 0000 00C2 VME Memory Map PCI Local Bus Memory MapPCI Memory Map 0000 VMEbus Memory Map Programming ConsiderationsPCI Arbitration Programming Considerations VMEbus Master Mapping PCI Arbitration Assignments Interrupt HandlingPCI Bus Request PCI Masters MVME510x Interrupt Architecture Sources of Reset DMA Channels Reset Source Device Affected Processor/Memory Domain Endian IssuesPCI Domain Role of the Universe Asic VMEbus Domain General Specifications Characteristic Specification Power Requirements Model +5V +/-5% +12V +/-10% Cooling Requirements EMC CompliancePage Table B-1. Troubleshooting Problems Solving Startup ProblemsCondition Possible Problem Possible Resolution Ctrl -Q Ctrl -S Env CR Envd CRSt CR Troubleshooting Procedure Complete Table C-1. Motorola Computer Group Documents Motorola Computer Group DocumentsDocument Title Motorola Publication Number Table C-2. Manufacturers’ Documents Manufacturers’ DocumentsDocument Title Publication Number Related Documentation Table C-3. Related Specifications Related SpecificationsDocument Title and Source Publication Number Table D-1. RAM500 Feature Summary FeaturesOverview Functional Description RAM500 Description Table D-2. RAM500 Sdram Memory Size Options Figure D-1. RAM500 Block Diagram RAM500 Module Installation Host Clock Logic Figure D-2. RAM500 Module Placement on MVME5100 RAM500 Connectors Bottom Side Memory Expansion Connector P1 Table D-3. RAM500 Bottom Side Connector P1 Pin Assignments A12 A11 A10 A09 100 Top Side Memory Expansion Connector J1 Table D-4. RAM500 Top Side Connector J1 Pin Assignments DQ08 DQ09 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 CSE0L RAM500 Programming Issues Serial Presence Detect SPD DataPage EThermal Analysis Thermally Significant Components Thermal Analysis Thermally Significant Components XU1 IPMC761 Measuring Case Temperature Component Temperature MeasurementMeasuring Junction Temperature Preparation Component Temperature Measurement Figure E-3. Mounting a Thermocouple Under a Heatsink Measuring Local Air Temperature Figure E-4. Measuring Local Air TemperaturePage Index ENV IN-3 PHB/SMC IN-5