Programming Considerations
Endian Issues
The MVME510x supports both little-endian (e.g., Windows NT) and big- endian (e.g., AIX) software. The PowerPC processor and the VMEbus are inherently big-endian, while the PCI bus is inherently little-endian. The following sections summarize how the MVME510x handles software and hardware differences in big- and little-endian operations. For further details on endian considerations, refer to the MVME5100-Series Single Board Computer Programmer’s Reference Guide.
Processor/Memory Domain | |
The MPC750 processor can operate in both big-endian and little-endian | 6 |
mode. However, it always treats the external processor/memory bus as big- endian by performing address rearrangement and reordering when running in little-endian mode. The MPC registers in the Hawk MPU/PCI bus bridge controller, SMC memory controller, as well as DRAM, Flash, and system registers, always appear as big-endian.
Role of the Hawk ASIC
Because the PCI bus is little-endian, the PHB portion of the Hawk performs byte swapping in both directions (from PCI to memory and from the processor to PCI) to maintain address invariance while programmed to operate in big-endian mode with the processor and the memory subsystem.
In little-endian mode, the PHB reverse-rearrangesthe address for PCI- bound accesses and rearranges the address for memory-bound accesses (from PCI). In this case, no byte swapping is done.
PCI Domain
The PCI bus is inherently little-endian. All devices connected directly to the PCI bus operate in little-endian mode, regardless of the mode of operation in the processor’s domain.
PCI and Ethernet
Ethernet is byte-stream-oriented; the byte having the lowest address in memory is the first one to be transferred regardless of the endian mode. Since the PHB maintains address invariance in both little-endian and big-
