Motorola Single Board Computer, MVME5100 manual Sdram

4

Functional Description

Table 4-1. MVME5100 General Features (Continued)

Feature	Specification
L2 Cache (Optional)	1MB (MPC750 or MPC755) or 2MB (MPC7410) using
	burst-mode SRAM modules.
Memory	EEPROM, on-board programmable
	1MB via two 32-pin PLCC/CLCC sockets;
	16MB Surface Mount
Main Memory	PC100 ECC SDRAM with 100 MHz bus
(SDRAM)	32MB to 512MB on board, expandable to
	1GB via RAM500 memory mezzanine
NVRAM	32KB (4KB available for users)
Memory Controller	Hawk System Memory Controller (SMC)
PCI Host Bridge	Hawk PCI Host Bridge (PHB)
Interrupt Controller	Hawk Multi-Processor Interrupt Controller (MPIC)
Peripheral Support	Dual 16550-Compatible Asynchronous Serial Port’s Routed
	to the Front Panel RJ45 Connnector (COM1) and On-Board
	Header (COM2)
	Dual Ethernet Interfaces, one routed to the Front Panel
	RJ45, One Routed to the Front Panel RJ45 or Optionally
	Routed to P2, RJ45 on MVME761
VMEbus	Tundra Universe Controller, 64-bit PCI
	Programmable Interrupter & Interrupt Handler
	Programmable DMA Controller With Link List Support
	Full System Controller Functions
PCI/PMC/Expansion	Two 32/64-bit PMC Slots With Front-Panel I/O Plus,
	P2 Rear I/O (MVME2300 Routing)
	One PCI Expansion Connector (for the PMCSpan)
Miscellaneous	Combined RESET and ABORT Switch
	Status LEDs
Form Factor	6U VME

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