Motorola Single Board Computer Programming Considerations, VMEbus Memory Map, PCI Arbitration

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Programming the MVME51xx

VMEbus Memory Map

The VMEbus is programmable. Like other parts of the MVME510x memory map, the mapping of local resources as viewed by VMEbus masters varies among applications.

The Universe PCI/VME bus bridge ASIC includes a user-programmable map decoder for the VMEbus-to-local-bus interface. The address translation capabilities of the Universe enable the processor to access any range of addresses on the VMEbus.

Recommendations for VMEbus mapping, including suggested CHRP- and PREP-compatible memory maps, can be found in the MVME5100-Series Single Board Computer Programmer’s Reference Guide. Figure 6-1shows the overall mapping approach from the standpoint of a VMEbus master.

Programming Considerations

Good programming practice dictates that only one MPU at a time have control of the MVME510x control registers. Of particular note are:

❏Registers that modify the address map

❏Registers that require two cycles to access

❏VMEbus interrupt request registers

PCI Arbitration

There are seven potential PCI bus masters on the MVME510x:

❏Hawk ASIC (MPU/PCI bus bridge controller)

❏Winbond W83C554 PIB (PCI/ISA bus bridge controller)

❏DECchip 21143 Ethernet controller

❏Universe II ASIC (PCI/VME bus bridge controller)

❏PMC Slot 1 (PCI mezzanine card)

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