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Sigma Altera DE2 Board, DE2-70 Control Panel, DE2-70 Video Utility, Using the DE2-70 Board

Models: DE2-70

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Altera DE2 Board
CONTENTS
Chapter 1 DE2-70 Package		1
1.1	Package Contents	1
1.2	The DE2-70 Board Assembly	2
1.3	Getting Help	3
Chapter 2 Altera DE2-70 Board		4
2.1	Layout and Components	4
2.2	Block Diagram of the DE2-70 Board	5
2.3	Power-up the DE2-70 Board	9
Chapter 3 DE2-70 Control Panel		11
3.1	Control Panel Setup	11
3.2	Controlling the LEDs, 7-Segment Displays and LCD Display	13
3.3	Switches and Buttons	15
3.4	SDRAM/SSRAM/Flash Controller and Programmer	16
3.5	USB Monitoring	18
3.6	PS2 Device	19
3.7	SD CARD	20
3.8	Audio Playing and Recording	21
3.9	Overall Structure of the DE2-70 Control Panel	23
Chapter 4 DE2-70 Video Utility		25
4.1	Video Utility Setup	25
4.2	VGA Display	26
4.3	Video Capture	27
4.4	Overall Structure of the DE2-70 Video Utility	28
Chapter 5 Using the DE2-70 Board		30
5.1	Configuring the Cyclone II FPGA	30
5.2	Using the LEDs and Switches	32
5.3	Using the 7-segment Displays	36
5.4	Clock Circuitry	38
5.5	Using the LCD Module	40
5.6	Using the Expansion Header	41
5.7	Using VGA	45
5.8	Using the 24-bit Audio CODEC	48
5.9	RS-232 Serial Port	49
5.10	PS/2 Serial Port	49
5.11	Fast Ethernet Network Controller	50
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Sigma manual Altera DE2 Board, DE2-70 Control Panel, DE2-70 Video Utility, Using the DE2-70 Board, Contents

Contents

Copyright 2007 Terasic Technologies VersionChapter 3 DE2-70 Control Panel Chapter 5 Using the DE2-70 BoardAltera DE2 Board Chapter 4 DE2-70 Video UtilityAltera DE2 Board Chapter 6 Examples of Advanced DemonstrationsChapter 7 Appendix Chapter 1.1 Package ContentsDE2-70 Package DE2-70 User Manual1.2 The DE2-70 Board Assembly Altera Corporation 101 Innovation Drive 1.3 Getting HelpTerasic Technologies No. 356, Sec. 1, Fusing E. Rd San Jose, California, 95134 USA Email university@altera.comChapter Altera DE2-70 Board2.1 Layout and Components 2.2 Block Diagram of the DE2-70 Board Serial Configuration device and USB Blaster circuit Cyclone II 2C70 FPGASSRAM Pushbutton switchesToggle switches SDRAMNTSC/PAL/ SECAM TV decoder circuit Audio CODECVGA output 10/100 Ethernet controllerIrDA transceiver 2.3 Power-up the DE2-70 BoardSerial ports Two 40-pin expansion headersThe LCD display shows Welcome to the Altera DE2-70 Chapter 3.1 Control Panel SetupDE2-70 Control Panel Figure 3.1. The DE2-70 Control Panel 3.2 Controlling the LEDs, 7-Segment Displays and LCD Display DE2-70 User Manual Figure 3.3. Controlling LEDsFigure 3.4. Controlling 7-SEG display 3.3 Switches and Buttons 3.4 SDRAM/SSRAM/Flash Controller and Programmer Figure 3.7. Accessing the SDRAM-U1 3. Press Load Memory Content to a File button 3.5 USB Monitoring3.6 PS2 Device 3.7 SD CARD 3.8 Audio Playing and Recording Figure 3.11. Playing audio from a selected wave file 3.9 Overall Structure of the DE2-70 Control Panel FPGA/ SOPC Figure 3.13. The block diagram of the DE2-70 control panelDE2-70 User Manual Chapter 4.1 Video Utility SetupDE2-70 Video Utility 4.2 VGA Display 4.3 Video Capture 4.4 Overall Structure of the DE2-70 Video Utility Figure 4.4. Video Capture Block Diagram Chapter Using the DE2-70 Board5.1 Configuring the Cyclone II FPGA FPGA Configuring the FPGA in JTAG ModeConfiguring the EPCS16 in AS Mode 5.2 Using the LEDs and Switches Figure 5.4. Schematic diagram of the pushbutton and toggle switches DE2-70 User Manual Figure 5.5. Schematic diagram of the LEDsSignal Name FPGA Pin NoDE2-70 User Manual Table 5.1. Pin assignments for the toggle switchesTable 5.2. Pin assignments for the pushbutton switches 5.3 Using the 7-segment Displays DE2-70 User Manual 5.4 Clock Circuitry Table 5.5. Pin assignments for the clock inputs Figure 5.8. Block diagram of the clock distributionConnector DE2-70 User Manual5.5 Using the LCD Module 16 DIGIT LCD5.6 Using the Expansion Header DE2-70 User Manual protection registors and diodes not shown for other portsprotection registors and diodes not shown for other ports 1.8V 2.5VDE2-70 User Manual Table 5.8. Pin assignments for the expansion headers DE2-70 User Manual5.7 Using VGA Figure 5.13. VGA horizontal timing specification Table 5.11. ADV7123 pin assignments DE2-70 User Manual5.8 Using the 24-bit Audio CODEC 5.9 RS-232 Serial Port 5.10 PS/2 Serial Port5.11 Fast Ethernet Network Controller Figure 5.17. Fast Ethernet schematic DE2-70 User Manual5.12 TV Decoder Figure 5.18. TV Decoder schematic DE2-70 User Manual5.13 Implementing a TV Encoder 5.14 Using USB Host and Device 5.15 Using IrDA http//techtrain.microchip.com/webseminars/documents/IrDABW.pdf5.16 Using SDRAM/SRAM/Flash SDRAM0 Figure 5.22. SDRAM schematicDE2-70 User Manual SDRAM1DE2-70 User Manual Figure 5.23. SSRAM schematicFigure 5.24. Flash schematic SSRAM 512Kx36DE2-70 User Manual DRAM0A0DE2-70 User Manual DRAM0CKETable 5.19. SDRAM pin assignments DE2-70 User ManualSRAM Processor Address Status DE2-70 User ManualSRAM Controller Address Status SRAM Burst Address AdvanceTable 5.20. SSRAM pin assignments DE2-70 User ManualTable 5.21. Flash pin assignments DE2-70 User ManualDemonstration Setup, File Locations, and Instructions 6.1 DE2-70 Factory ConfigurationInstalling the Demonstrations Bit stream used DE270Default.sof or DE270Default.pof6.2 TV Box Demonstration Bit stream used DE270TV.sof or DE270TV.pof Figure 6.1. Block diagram of the TV box demonstrationmonitor Demonstration Setup, File Locations, and Instructions6.3 TV Box Picture in Picture PIP Demonstration signal Bit stream used DE270TVPIP.sof or DE270TVPIP.pofDemonstration Setup, File Locations, and Instructions PiPpositionLoad the bit stream into FPGA 6.4 USB Paintbrush Nios II Workspace DE270NIOSHOSTMOUSEVGA\Software Project directory DE270NIOSHOSTMOUSEVGABit stream used DE270NIOSHOSTMOUSEVGA.sof Demonstration Setup, File Locations, and Instructions6.5 USB Device Nios II Workspace DE270NIOSDEVICELED\HW\Software Project directory DE270NIOSDEVICELED\HWBit stream used DE270NIOSDEVICELED.sof Demonstration Setup, File Locations, and Instructions6.6 A Karaoke Machine Figure 6.9. Block diagram of the Karaoke Machine demonstration Bit stream used DE2-70i2sound.sof or DE2-70i2sound.pofDemonstration Setup, File Locations, and Instructions Clock/Data Frequency Generator 6.7 Ethernet Packet Sending/ReceivingMP3/Any Audio Output Speaker Microphone Demonstration Setup, File Locations, and Instructions 6.8 SD Card Music Player Figure 6.13. Block diagram of the SD music player demonstration Nios II Workspace DE270SDCardAudioPlayer\Software Project directory DE270SDCardAudioPlayerBit stream used DE270SDCardAudioPlayer.sof Demonstration Setup, File Locations, and Instructions6.9 Music Synthesizer Demonstration Demonstration Setup, File Locations, and Instructions Figure 6.17 illustrates the setup for this demonstrationBit stream used DE270Synthesizer.sof or DE2-70Synthesizer.pof Speaker DE2-70 User ManualLine Out VGALCD/CRTMonitor6.10 Audio Recording and Playing Demonstration Setup, File Locations, and Instructions SOPCSoftware Project directory DE270AUDIO\software\projectaudio Load the Software Execution File into FPGA. note *1 Copyright Statement AppendixRevision History Chapter