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Sigma DE2-70 Project directory DE270NIOSDEVICELED\HW, Bit stream used DE270NIOSDEVICELED.sof

Models: DE2-70

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$•Project directory: DE2_70_NIOS_DEVICE_LED\HW$

DE2-70 User Manual

the user clicks on the Clear button in the window panel of the software driver, the host computer sends a different USB packet to the board, which causes the Nios II processor to clear the hardware counter to zero.

Figure 6.7. Block diagram of the USB device demonstration.

Demonstration Setup, File Locations, and Instructions

•Project directory: DE2_70_NIOS_DEVICE_LED\HW

•Bit stream used: DE2_70_NIOS_DEVICE_LED.sof

•Nios II Workspace: DE2_70_NIOS_DEVICE_LED\HW\Software

•Borland BC++ Software Driver: DE2_70_NIOS_DEVICE_LED\SW

•Connect the USB Device connector of the DE2-70 board to the host computer using a USB cable (type A → B).

•Load the bit stream into FPGA

•Run Nios II IDE with HW as the workspace. Click on Compile and Run

•A new USB hardware device will be detected. Specify the location of the driver as DE2_70_NIOS_DEVICE_LED\D12test.inf (Philips PDIUSBD12 SMART Evaluation Board). Ignore any warning messages produced during installation

•The host computer should report that a Philips PDIUSBD12 SMART Evaluation Board is now installed

•Execute the software: DE2_70_NIOS_DEVICE_LED\SW\ISP1362DcUsb.exe on the host computer. Then, experiment with the software by clicking on the ADD and Clear buttons

Figure 6.8 illustrates the setup for this demonstration.

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$Sigma DE2-70 manual Project directory DE270NIOSDEVICELED\HW, Bit stream used DE270NIOSDEVICELED.sof$

Contents

Copyright 2007 Terasic Technologies VersionChapter 3 DE2-70 Control Panel Chapter 5 Using the DE2-70 BoardAltera DE2 Board Chapter 4 DE2-70 Video UtilityChapter 6 Examples of Advanced Demonstrations Chapter 7 AppendixAltera DE2 Board Chapter 1.1 Package ContentsDE2-70 Package DE2-70 User Manual1.2 The DE2-70 Board Assembly Altera Corporation 101 Innovation Drive 1.3 Getting HelpTerasic Technologies No. 356, Sec. 1, Fusing E. Rd San Jose, California, 95134 USA Email university@altera.comAltera DE2-70 Board 2.1 Layout and ComponentsChapter 2.2 Block Diagram of the DE2-70 Board Serial Configuration device and USB Blaster circuit Cyclone II 2C70 FPGASSRAM Pushbutton switchesToggle switches SDRAMNTSC/PAL/ SECAM TV decoder circuit Audio CODECVGA output 10/100 Ethernet controllerIrDA transceiver 2.3 Power-up the DE2-70 BoardSerial ports Two 40-pin expansion headersThe LCD display shows Welcome to the Altera DE2-70 3.1 Control Panel Setup DE2-70 Control PanelChapter Figure 3.1. The DE2-70 Control Panel 3.2 Controlling the LEDs, 7-Segment Displays and LCD Display Figure 3.3. Controlling LEDs Figure 3.4. Controlling 7-SEG displayDE2-70 User Manual 3.3 Switches and Buttons 3.4 SDRAM/SSRAM/Flash Controller and Programmer Figure 3.7. Accessing the SDRAM-U1 3. Press Load Memory Content to a File button 3.5 USB Monitoring3.6 PS2 Device 3.7 SD CARD 3.8 Audio Playing and Recording Figure 3.11. Playing audio from a selected wave file 3.9 Overall Structure of the DE2-70 Control Panel Figure 3.13. The block diagram of the DE2-70 control panel DE2-70 User ManualFPGA/ SOPC 4.1 Video Utility Setup DE2-70 Video UtilityChapter 4.2 VGA Display 4.3 Video Capture 4.4 Overall Structure of the DE2-70 Video Utility Figure 4.4. Video Capture Block Diagram Using the DE2-70 Board 5.1 Configuring the Cyclone II FPGAChapter Configuring the FPGA in JTAG Mode Configuring the EPCS16 in AS ModeFPGA 5.2 Using the LEDs and Switches Figure 5.4. Schematic diagram of the pushbutton and toggle switches DE2-70 User Manual Figure 5.5. Schematic diagram of the LEDsSignal Name FPGA Pin NoTable 5.1. Pin assignments for the toggle switches Table 5.2. Pin assignments for the pushbutton switchesDE2-70 User Manual 5.3 Using the 7-segment Displays DE2-70 User Manual 5.4 Clock Circuitry Table 5.5. Pin assignments for the clock inputs Figure 5.8. Block diagram of the clock distributionConnector DE2-70 User Manual5.5 Using the LCD Module 16 DIGIT LCD5.6 Using the Expansion Header DE2-70 User Manual protection registors and diodes not shown for other portsprotection registors and diodes not shown for other ports 1.8V 2.5VDE2-70 User Manual Table 5.8. Pin assignments for the expansion headers DE2-70 User Manual5.7 Using VGA Figure 5.13. VGA horizontal timing specification Table 5.11. ADV7123 pin assignments DE2-70 User Manual5.8 Using the 24-bit Audio CODEC 5.9 RS-232 Serial Port 5.10 PS/2 Serial Port5.11 Fast Ethernet Network Controller Figure 5.17. Fast Ethernet schematic DE2-70 User Manual5.12 TV Decoder Figure 5.18. TV Decoder schematic DE2-70 User Manual5.13 Implementing a TV Encoder 5.14 Using USB Host and Device 5.15 Using IrDA http//techtrain.microchip.com/webseminars/documents/IrDABW.pdf5.16 Using SDRAM/SRAM/Flash SDRAM0 Figure 5.22. SDRAM schematicDE2-70 User Manual SDRAM1DE2-70 User Manual Figure 5.23. SSRAM schematicFigure 5.24. Flash schematic SSRAM 512Kx36DE2-70 User Manual DRAM0A0DE2-70 User Manual DRAM0CKETable 5.19. SDRAM pin assignments DE2-70 User ManualSRAM Processor Address Status DE2-70 User ManualSRAM Controller Address Status SRAM Burst Address AdvanceTable 5.20. SSRAM pin assignments DE2-70 User ManualTable 5.21. Flash pin assignments DE2-70 User ManualDemonstration Setup, File Locations, and Instructions 6.1 DE2-70 Factory ConfigurationInstalling the Demonstrations Bit stream used DE270Default.sof or DE270Default.pof6.2 TV Box Demonstration Bit stream used DE270TV.sof or DE270TV.pof Figure 6.1. Block diagram of the TV box demonstrationmonitor Demonstration Setup, File Locations, and Instructions6.3 TV Box Picture in Picture PIP Demonstration signal Bit stream used DE270TVPIP.sof or DE270TVPIP.pofDemonstration Setup, File Locations, and Instructions PiPpositionLoad the bit stream into FPGA 6.4 USB Paintbrush Nios II Workspace DE270NIOSHOSTMOUSEVGA\Software Project directory DE270NIOSHOSTMOUSEVGABit stream used DE270NIOSHOSTMOUSEVGA.sof Demonstration Setup, File Locations, and Instructions6.5 USB Device Nios II Workspace DE270NIOSDEVICELED\HW\Software Project directory DE270NIOSDEVICELED\HWBit stream used DE270NIOSDEVICELED.sof Demonstration Setup, File Locations, and Instructions6.6 A Karaoke Machine Bit stream used DE2-70i2sound.sof or DE2-70i2sound.pof Demonstration Setup, File Locations, and InstructionsFigure 6.9. Block diagram of the Karaoke Machine demonstration 6.7 Ethernet Packet Sending/Receiving MP3/Any Audio Output Speaker MicrophoneClock/Data Frequency Generator Demonstration Setup, File Locations, and Instructions 6.8 SD Card Music Player Figure 6.13. Block diagram of the SD music player demonstration Nios II Workspace DE270SDCardAudioPlayer\Software Project directory DE270SDCardAudioPlayerBit stream used DE270SDCardAudioPlayer.sof Demonstration Setup, File Locations, and Instructions6.9 Music Synthesizer Demonstration Demonstration Setup, File Locations, and Instructions Figure 6.17 illustrates the setup for this demonstrationBit stream used DE270Synthesizer.sof or DE2-70Synthesizer.pof Speaker DE2-70 User ManualLine Out VGALCD/CRTMonitor6.10 Audio Recording and Playing SOPC Software Project directory DE270AUDIO\software\projectaudioDemonstration Setup, File Locations, and Instructions Load the Software Execution File into FPGA. note *1 Copyright Statement AppendixRevision History Chapter