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Sigma manual DE2-70 Video Utility, Video Utility Setup, Chapter

Models: DE2-70

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DE2-70 User Manual

Chapter 4

DE2-70 Video Utility

The DE2-70 board comes with a video utility that allows users to access video components on the board from a host computer. The host computer communicates with the board through the USB-Blaster link. The facility can be used to verify the functionality of video components on the board, capture the video sent from the video-in ports, or display desired pattern on the VGA port.

This chapter first presents some basic functions of the Video Utility control panel, then describes its structure in block diagram form, and finally describes its capabilities.

4.1 Video Utility Setup

The Video Utility is located in the “DE2_70_video utility/SW” folder in the DE2-70 System CD-ROM. To install it, just copy the whole folder to your host computer. Launch the Video Utility by executing the “DE2_70_AV_UTILITY.exe”.

Specific configuration files should be downloaded to your FPGA board before the Control Panel can request it to perform required tasks. The configuration files include one .sof file and one .elf file. To download the codes, simply click the “Download Code” button on the program. The program will call Quartus II and Nios II tools to download the control codes to the FPGA board through USB-Blaseter[USB-0] connection. The .sof file is downloaded to FPGA. The .elf file is downloaded to SDRAM-U1.

To activate the Video Utility, perform the following steps:

1.Make sure Quartus II and Nios II are installed successfully on your PC.

2.Connect the supplied USB cable to the USB Blaster port, connect the 12V power supply, and turn the power switch ON

3.Set the RUN/PROG switch to the RUN position

4.Start the executable DE2_70_AV_Utility.exe on the host computer. The Video Utility user interface shown in Figure 4.1 will appear.

5.Click the “Download Code” button. The Control Panel will occupy the USB port until you close that port; you cannot use Quartus II to download a configuration file into the FPGA until you close the USB port.

6.The Video Utility is now ready for use.

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Sigma manual DE2-70 Video Utility, Video Utility Setup, Chapter

Contents

Copyright 2007 Terasic Technologies VersionChapter 5 Using the DE2-70 Board Altera DE2 BoardChapter 3 DE2-70 Control Panel Chapter 4 DE2-70 Video UtilityChapter 7 Appendix Chapter 6 Examples of Advanced DemonstrationsAltera DE2 Board 1.1 Package Contents DE2-70 PackageChapter DE2-70 User Manual1.2 The DE2-70 Board Assembly 1.3 Getting Help Terasic Technologies No. 356, Sec. 1, Fusing E. RdAltera Corporation 101 Innovation Drive San Jose, California, 95134 USA Email university@altera.com2.1 Layout and Components Altera DE2-70 BoardChapter 2.2 Block Diagram of the DE2-70 Board Serial Configuration device and USB Blaster circuit Cyclone II 2C70 FPGAPushbutton switches Toggle switchesSSRAM SDRAMAudio CODEC VGA outputNTSC/PAL/ SECAM TV decoder circuit 10/100 Ethernet controller2.3 Power-up the DE2-70 Board Serial portsIrDA transceiver Two 40-pin expansion headersThe LCD display shows Welcome to the Altera DE2-70 DE2-70 Control Panel 3.1 Control Panel SetupChapter Figure 3.1. The DE2-70 Control Panel 3.2 Controlling the LEDs, 7-Segment Displays and LCD Display Figure 3.4. Controlling 7-SEG display Figure 3.3. Controlling LEDsDE2-70 User Manual 3.3 Switches and Buttons 3.4 SDRAM/SSRAM/Flash Controller and Programmer Figure 3.7. Accessing the SDRAM-U1 3. Press Load Memory Content to a File button 3.5 USB Monitoring3.6 PS2 Device 3.7 SD CARD 3.8 Audio Playing and Recording Figure 3.11. Playing audio from a selected wave file 3.9 Overall Structure of the DE2-70 Control Panel DE2-70 User Manual Figure 3.13. The block diagram of the DE2-70 control panelFPGA/ SOPC DE2-70 Video Utility 4.1 Video Utility SetupChapter 4.2 VGA Display 4.3 Video Capture 4.4 Overall Structure of the DE2-70 Video Utility Figure 4.4. Video Capture Block Diagram 5.1 Configuring the Cyclone II FPGA Using the DE2-70 BoardChapter Configuring the EPCS16 in AS Mode Configuring the FPGA in JTAG ModeFPGA 5.2 Using the LEDs and Switches Figure 5.4. Schematic diagram of the pushbutton and toggle switches Figure 5.5. Schematic diagram of the LEDs Signal NameDE2-70 User Manual FPGA Pin NoTable 5.2. Pin assignments for the pushbutton switches Table 5.1. Pin assignments for the toggle switchesDE2-70 User Manual 5.3 Using the 7-segment Displays DE2-70 User Manual 5.4 Clock Circuitry Figure 5.8. Block diagram of the clock distribution ConnectorTable 5.5. Pin assignments for the clock inputs DE2-70 User Manual5.5 Using the LCD Module 16 DIGIT LCD5.6 Using the Expansion Header protection registors and diodes not shown for other ports protection registors and diodes not shown for other portsDE2-70 User Manual 1.8V 2.5VDE2-70 User Manual Table 5.8. Pin assignments for the expansion headers DE2-70 User Manual5.7 Using VGA Figure 5.13. VGA horizontal timing specification Table 5.11. ADV7123 pin assignments DE2-70 User Manual5.8 Using the 24-bit Audio CODEC 5.9 RS-232 Serial Port 5.10 PS/2 Serial Port5.11 Fast Ethernet Network Controller Figure 5.17. Fast Ethernet schematic DE2-70 User Manual5.12 TV Decoder Figure 5.18. TV Decoder schematic DE2-70 User Manual5.13 Implementing a TV Encoder 5.14 Using USB Host and Device 5.15 Using IrDA http//techtrain.microchip.com/webseminars/documents/IrDABW.pdf5.16 Using SDRAM/SRAM/Flash Figure 5.22. SDRAM schematic DE2-70 User ManualSDRAM0 SDRAM1Figure 5.23. SSRAM schematic Figure 5.24. Flash schematicDE2-70 User Manual SSRAM 512Kx36DE2-70 User Manual DRAM0A0DE2-70 User Manual DRAM0CKETable 5.19. SDRAM pin assignments DE2-70 User ManualDE2-70 User Manual SRAM Controller Address StatusSRAM Processor Address Status SRAM Burst Address AdvanceTable 5.20. SSRAM pin assignments DE2-70 User ManualTable 5.21. Flash pin assignments DE2-70 User Manual6.1 DE2-70 Factory Configuration Installing the DemonstrationsDemonstration Setup, File Locations, and Instructions Bit stream used DE270Default.sof or DE270Default.pof6.2 TV Box Demonstration Figure 6.1. Block diagram of the TV box demonstration monitorBit stream used DE270TV.sof or DE270TV.pof Demonstration Setup, File Locations, and Instructions6.3 TV Box Picture in Picture PIP Demonstration Bit stream used DE270TVPIP.sof or DE270TVPIP.pof Demonstration Setup, File Locations, and Instructionssignal PiPpositionLoad the bit stream into FPGA 6.4 USB Paintbrush Project directory DE270NIOSHOSTMOUSEVGA Bit stream used DE270NIOSHOSTMOUSEVGA.sofNios II Workspace DE270NIOSHOSTMOUSEVGA\Software Demonstration Setup, File Locations, and Instructions6.5 USB Device Project directory DE270NIOSDEVICELED\HW Bit stream used DE270NIOSDEVICELED.sofNios II Workspace DE270NIOSDEVICELED\HW\Software Demonstration Setup, File Locations, and Instructions6.6 A Karaoke Machine Demonstration Setup, File Locations, and Instructions Bit stream used DE2-70i2sound.sof or DE2-70i2sound.pofFigure 6.9. Block diagram of the Karaoke Machine demonstration MP3/Any Audio Output Speaker Microphone 6.7 Ethernet Packet Sending/ReceivingClock/Data Frequency Generator Demonstration Setup, File Locations, and Instructions 6.8 SD Card Music Player Figure 6.13. Block diagram of the SD music player demonstration Project directory DE270SDCardAudioPlayer Bit stream used DE270SDCardAudioPlayer.sofNios II Workspace DE270SDCardAudioPlayer\Software Demonstration Setup, File Locations, and Instructions6.9 Music Synthesizer Demonstration Demonstration Setup, File Locations, and Instructions Figure 6.17 illustrates the setup for this demonstrationBit stream used DE270Synthesizer.sof or DE2-70Synthesizer.pof DE2-70 User Manual Line OutSpeaker VGALCD/CRTMonitor6.10 Audio Recording and Playing Software Project directory DE270AUDIO\software\projectaudio SOPCDemonstration Setup, File Locations, and Instructions Load the Software Execution File into FPGA. note *1 Appendix Revision HistoryCopyright Statement Chapter