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Sigma DE2-70 manual Sopc, Software Project directory DE270AUDIO\software\projectaudio

Models: DE2-70

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SOPC

DE2-70 User Manual

hardware part is built by SOPC Builder under Quartus II. The hardware part includes all the other blocks. The “AUDIO Controller” is a user-defined SOPC component. It is designed to send audio data to the audio chip or receive audio data from the audio chip.

The audio chip is programmed through I2C protocol which is implemented in C code. The I2C pin from audio chip is connected to SOPC System Interconnect Fabric through PIO controllers. In this example, the audio chip is configured in Master Mode. The audio interface is configured as I2S and 16-bit mode. A 18.432MHz clock generated by the PLL is connected to the XTI/MCLK pin of the audio chip through the AUDIO Controller.

		SOPC
50M Hz					Store
RESE_N			SDRAM	SDRAM	Audio
RESE_N	NIOS II		SDRAM	SDRAM	Data
	NIOS II		Controller
			Controller
	JTAG		SRAM	SRAM	Nios II
	JTAG	System	Controller		Program
	UART	System	PIO	LED/KEY/SW/I2C
		Interconnect	PIO	LED/KEY/SW/I2C
Clock	PLL		LCD	LCD
			Controller	LCD
			Controller
to		Fabric
SDRAM			SEG7	SEG7
SRAM			SEG7	SEG7
SRAM			Controller
			Controller
			AUDIO	AUDIO
			Controller	AUDIO
			Controller

Figure 6.19. Block diagram of the audio recorder and player.

Demonstration Setup, File Locations, and Instructions

•Hardware Project directory: DE2_70_AUDIO

•Bit stream used: DE2P_TOP.sof

•Software Project directory: DE2_70_AUDIO\software\project_audio

•Software Execution File: DE2_70_AUDIO\software\project_auido\audio\debug\audio.elf

•Connect an Audio Source to the LINE-IN port of the DE2-70 board.

•Connect a Microphone to MIC-IN port on the DE2-70 board.

•Connect a speaker or headset to LINE-OUT port on the DE2-70 board.

•Load the bit stream into FPGA. (note *1)

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$Sigma DE2-70 manual Sopc, Software Project directory DE270AUDIO\software\projectaudio$

Contents

Version Copyright 2007 Terasic TechnologiesChapter 4 DE2-70 Video Utility Chapter 5 Using the DE2-70 BoardAltera DE2 Board Chapter 3 DE2-70 Control PanelChapter 7 Appendix Chapter 6 Examples of Advanced DemonstrationsAltera DE2 Board DE2-70 User Manual 1.1 Package ContentsDE2-70 Package Chapter1.2 The DE2-70 Board Assembly San Jose, California, 95134 USA Email university@altera.com 1.3 Getting HelpTerasic Technologies No. 356, Sec. 1, Fusing E. Rd Altera Corporation 101 Innovation Drive2.1 Layout and Components Altera DE2-70 BoardChapter 2.2 Block Diagram of the DE2-70 Board Cyclone II 2C70 FPGA Serial Configuration device and USB Blaster circuitSDRAM Pushbutton switchesToggle switches SSRAM10/100 Ethernet controller Audio CODECVGA output NTSC/PAL/ SECAM TV decoder circuitTwo 40-pin expansion headers 2.3 Power-up the DE2-70 BoardSerial ports IrDA transceiverThe LCD display shows Welcome to the Altera DE2-70 DE2-70 Control Panel 3.1 Control Panel SetupChapter Figure 3.1. The DE2-70 Control Panel 3.2 Controlling the LEDs, 7-Segment Displays and LCD Display Figure 3.4. Controlling 7-SEG display Figure 3.3. Controlling LEDsDE2-70 User Manual 3.3 Switches and Buttons 3.4 SDRAM/SSRAM/Flash Controller and Programmer Figure 3.7. Accessing the SDRAM-U1 3.5 USB Monitoring 3. Press Load Memory Content to a File button3.6 PS2 Device 3.7 SD CARD 3.8 Audio Playing and Recording Figure 3.11. Playing audio from a selected wave file 3.9 Overall Structure of the DE2-70 Control Panel DE2-70 User Manual Figure 3.13. The block diagram of the DE2-70 control panelFPGA/ SOPC DE2-70 Video Utility 4.1 Video Utility SetupChapter 4.2 VGA Display 4.3 Video Capture 4.4 Overall Structure of the DE2-70 Video Utility Figure 4.4. Video Capture Block Diagram 5.1 Configuring the Cyclone II FPGA Using the DE2-70 BoardChapter Configuring the EPCS16 in AS Mode Configuring the FPGA in JTAG ModeFPGA 5.2 Using the LEDs and Switches Figure 5.4. Schematic diagram of the pushbutton and toggle switches FPGA Pin No Figure 5.5. Schematic diagram of the LEDsSignal Name DE2-70 User ManualTable 5.2. Pin assignments for the pushbutton switches Table 5.1. Pin assignments for the toggle switchesDE2-70 User Manual 5.3 Using the 7-segment Displays DE2-70 User Manual 5.4 Clock Circuitry DE2-70 User Manual Figure 5.8. Block diagram of the clock distributionConnector Table 5.5. Pin assignments for the clock inputs16 DIGIT LCD 5.5 Using the LCD Module5.6 Using the Expansion Header 1.8V 2.5V protection registors and diodes not shown for other portsprotection registors and diodes not shown for other ports DE2-70 User ManualDE2-70 User Manual DE2-70 User Manual Table 5.8. Pin assignments for the expansion headers5.7 Using VGA Figure 5.13. VGA horizontal timing specification DE2-70 User Manual Table 5.11. ADV7123 pin assignments5.8 Using the 24-bit Audio CODEC 5.10 PS/2 Serial Port 5.9 RS-232 Serial Port5.11 Fast Ethernet Network Controller DE2-70 User Manual Figure 5.17. Fast Ethernet schematic5.12 TV Decoder DE2-70 User Manual Figure 5.18. TV Decoder schematic5.13 Implementing a TV Encoder 5.14 Using USB Host and Device http//techtrain.microchip.com/webseminars/documents/IrDABW.pdf 5.15 Using IrDA5.16 Using SDRAM/SRAM/Flash SDRAM1 Figure 5.22. SDRAM schematicDE2-70 User Manual SDRAM0SSRAM 512Kx36 Figure 5.23. SSRAM schematicFigure 5.24. Flash schematic DE2-70 User ManualDRAM0A0 DE2-70 User ManualDRAM0CKE DE2-70 User ManualDE2-70 User Manual Table 5.19. SDRAM pin assignmentsSRAM Burst Address Advance DE2-70 User ManualSRAM Controller Address Status SRAM Processor Address StatusDE2-70 User Manual Table 5.20. SSRAM pin assignmentsDE2-70 User Manual Table 5.21. Flash pin assignmentsBit stream used DE270Default.sof or DE270Default.pof 6.1 DE2-70 Factory ConfigurationInstalling the Demonstrations Demonstration Setup, File Locations, and Instructions6.2 TV Box Demonstration Demonstration Setup, File Locations, and Instructions Figure 6.1. Block diagram of the TV box demonstrationmonitor Bit stream used DE270TV.sof or DE270TV.pof6.3 TV Box Picture in Picture PIP Demonstration PiPposition Bit stream used DE270TVPIP.sof or DE270TVPIP.pofDemonstration Setup, File Locations, and Instructions signalLoad the bit stream into FPGA 6.4 USB Paintbrush Demonstration Setup, File Locations, and Instructions Project directory DE270NIOSHOSTMOUSEVGABit stream used DE270NIOSHOSTMOUSEVGA.sof Nios II Workspace DE270NIOSHOSTMOUSEVGA\Software6.5 USB Device Demonstration Setup, File Locations, and Instructions Project directory DE270NIOSDEVICELED\HWBit stream used DE270NIOSDEVICELED.sof Nios II Workspace DE270NIOSDEVICELED\HW\Software6.6 A Karaoke Machine Demonstration Setup, File Locations, and Instructions Bit stream used DE2-70i2sound.sof or DE2-70i2sound.pofFigure 6.9. Block diagram of the Karaoke Machine demonstration MP3/Any Audio Output Speaker Microphone 6.7 Ethernet Packet Sending/ReceivingClock/Data Frequency Generator Demonstration Setup, File Locations, and Instructions 6.8 SD Card Music Player Figure 6.13. Block diagram of the SD music player demonstration Demonstration Setup, File Locations, and Instructions Project directory DE270SDCardAudioPlayerBit stream used DE270SDCardAudioPlayer.sof Nios II Workspace DE270SDCardAudioPlayer\Software6.9 Music Synthesizer Demonstration Figure 6.17 illustrates the setup for this demonstration Demonstration Setup, File Locations, and InstructionsBit stream used DE270Synthesizer.sof or DE2-70Synthesizer.pof VGALCD/CRTMonitor DE2-70 User ManualLine Out Speaker6.10 Audio Recording and Playing Software Project directory DE270AUDIO\software\projectaudio SOPCDemonstration Setup, File Locations, and Instructions Load the Software Execution File into FPGA. note *1 Chapter AppendixRevision History Copyright Statement