Copyright 2007 Terasic Technologies
Version
Chapter 5 Using the DE2-70 Board
Altera DE2 Board
Chapter 3 DE2-70 Control Panel
Chapter 4 DE2-70 Video Utility
Chapter 7 Appendix
Chapter 6 Examples of Advanced Demonstrations
Altera DE2 Board
1.1 Package Contents
DE2-70 Package
Chapter
DE2-70 User Manual
1.2 The DE2-70 Board Assembly
1.3 Getting Help
Terasic Technologies No. 356, Sec. 1, Fusing E. Rd
Altera Corporation 101 Innovation Drive
San Jose, California, 95134 USA Email university@altera.com
2.1 Layout and Components
Altera DE2-70 Board
Chapter
2.2 Block Diagram of the DE2-70 Board
Serial Configuration device and USB Blaster circuit
Cyclone II 2C70 FPGA
Pushbutton switches
Toggle switches
SSRAM
SDRAM
Audio CODEC
VGA output
NTSC/PAL/ SECAM TV decoder circuit
10/100 Ethernet controller
2.3 Power-up the DE2-70 Board
Serial ports
IrDA transceiver
Two 40-pin expansion headers
The LCD display shows Welcome to the Altera DE2-70
DE2-70 Control Panel
3.1 Control Panel Setup
Chapter
Figure 3.1. The DE2-70 Control Panel
3.2 Controlling the LEDs, 7-Segment Displays and LCD Display
Figure 3.4. Controlling 7-SEG display
Figure 3.3. Controlling LEDs
DE2-70 User Manual
3.3 Switches and Buttons
3.4 SDRAM/SSRAM/Flash Controller and Programmer
Figure 3.7. Accessing the SDRAM-U1
3. Press Load Memory Content to a File button
3.5 USB Monitoring
3.6 PS2 Device
3.7 SD CARD
3.8 Audio Playing and Recording
Figure 3.11. Playing audio from a selected wave file
3.9 Overall Structure of the DE2-70 Control Panel
DE2-70 User Manual
Figure 3.13. The block diagram of the DE2-70 control panel
FPGA/ SOPC
DE2-70 Video Utility
4.1 Video Utility Setup
Chapter
4.2 VGA Display
4.3 Video Capture
4.4 Overall Structure of the DE2-70 Video Utility
Figure 4.4. Video Capture Block Diagram
5.1 Configuring the Cyclone II FPGA
Using the DE2-70 Board
Chapter
Configuring the EPCS16 in AS Mode
Configuring the FPGA in JTAG Mode
FPGA
5.2 Using the LEDs and Switches
Figure 5.4. Schematic diagram of the pushbutton and toggle switches
Figure 5.5. Schematic diagram of the LEDs
Signal Name
DE2-70 User Manual
FPGA Pin No
Table 5.2. Pin assignments for the pushbutton switches
Table 5.1. Pin assignments for the toggle switches
DE2-70 User Manual
5.3 Using the 7-segment Displays
DE2-70 User Manual
5.4 Clock Circuitry
Figure 5.8. Block diagram of the clock distribution
Connector
Table 5.5. Pin assignments for the clock inputs
DE2-70 User Manual
5.5 Using the LCD Module
16 DIGIT LCD
5.6 Using the Expansion Header
protection registors and diodes not shown for other ports
protection registors and diodes not shown for other ports
DE2-70 User Manual
1.8V 2.5V
DE2-70 User Manual
Table 5.8. Pin assignments for the expansion headers
DE2-70 User Manual
5.7 Using VGA
Figure 5.13. VGA horizontal timing specification
Table 5.11. ADV7123 pin assignments
DE2-70 User Manual
5.8 Using the 24-bit Audio CODEC
5.9 RS-232 Serial Port
5.10 PS/2 Serial Port
5.11 Fast Ethernet Network Controller
Figure 5.17. Fast Ethernet schematic
DE2-70 User Manual
5.12 TV Decoder
Figure 5.18. TV Decoder schematic
DE2-70 User Manual
5.13 Implementing a TV Encoder
5.14 Using USB Host and Device
5.15 Using IrDA
http//techtrain.microchip.com/webseminars/documents/IrDABW.pdf
5.16 Using SDRAM/SRAM/Flash
Figure 5.22. SDRAM schematic
DE2-70 User Manual
SDRAM0
SDRAM1
Figure 5.23. SSRAM schematic
Figure 5.24. Flash schematic
DE2-70 User Manual
SSRAM 512Kx36
DE2-70 User Manual
DRAM0A0
DE2-70 User Manual
DRAM0CKE
Table 5.19. SDRAM pin assignments
DE2-70 User Manual
DE2-70 User Manual
SRAM Controller Address Status
SRAM Processor Address Status
SRAM Burst Address Advance
Table 5.20. SSRAM pin assignments
DE2-70 User Manual
Table 5.21. Flash pin assignments
DE2-70 User Manual
6.1 DE2-70 Factory Configuration
Installing the Demonstrations
Demonstration Setup, File Locations, and Instructions
Bit stream used DE270Default.sof or DE270Default.pof
6.2 TV Box Demonstration
Figure 6.1. Block diagram of the TV box demonstration
monitor
Bit stream used DE270TV.sof or DE270TV.pof
Demonstration Setup, File Locations, and Instructions
6.3 TV Box Picture in Picture PIP Demonstration
Bit stream used DE270TVPIP.sof or DE270TVPIP.pof
Demonstration Setup, File Locations, and Instructions
signal
PiPposition
Load the bit stream into FPGA
6.4 USB Paintbrush
Project directory DE270NIOSHOSTMOUSEVGA
Bit stream used DE270NIOSHOSTMOUSEVGA.sof
Nios II Workspace DE270NIOSHOSTMOUSEVGA\Software
Demonstration Setup, File Locations, and Instructions
6.5 USB Device
Project directory DE270NIOSDEVICELED\HW
Bit stream used DE270NIOSDEVICELED.sof
Nios II Workspace DE270NIOSDEVICELED\HW\Software
Demonstration Setup, File Locations, and Instructions
6.6 A Karaoke Machine
Demonstration Setup, File Locations, and Instructions
Bit stream used DE2-70i2sound.sof or DE2-70i2sound.pof
Figure 6.9. Block diagram of the Karaoke Machine demonstration
MP3/Any Audio Output Speaker Microphone
6.7 Ethernet Packet Sending/Receiving
Clock/Data Frequency Generator
Demonstration Setup, File Locations, and Instructions
6.8 SD Card Music Player
Figure 6.13. Block diagram of the SD music player demonstration
Project directory DE270SDCardAudioPlayer
Bit stream used DE270SDCardAudioPlayer.sof
Nios II Workspace DE270SDCardAudioPlayer\Software
Demonstration Setup, File Locations, and Instructions
6.9 Music Synthesizer Demonstration
Demonstration Setup, File Locations, and Instructions
Figure 6.17 illustrates the setup for this demonstration
Bit stream used DE270Synthesizer.sof or DE2-70Synthesizer.pof
DE2-70 User Manual
Line Out
Speaker
VGALCD/CRTMonitor
6.10 Audio Recording and Playing
Software Project directory DE270AUDIO\software\projectaudio
SOPC
Demonstration Setup, File Locations, and Instructions
Load the Software Execution File into FPGA. note *1
Appendix
Revision History
Copyright Statement
Chapter