Toshiba TECRA, M10 manual Hardware Overview System Unit Block Diagram

1 Hardware Overview 1.2 System Unit Block Diagram

The system unit is composed of the following major components:

‰Microprocessor

The TOSHIBA TECRA M10 computer is equipped with an Intel® CoreTM 2 Duo Processor. These processors incorporate a math co-processor, a 3MB or 6MB L2 cache memory.

The PC comes in with one of the following speeds:

Intel® CoreTM 2 Duo Processor (Penryn)

•T9600 (2.80GHz) /T9400 (2.53GHz)

In the case of Processor which built in 6MB L2 cache memory

•P8600 (2.40GHz)/ P8400 (2.26GHz)

In the case of Processor which built in 3MB L2 cache memory

These processors operate at 1066MHz bus clock (FSB).

‰Memory

Two DDR2-667/DDR2-800 SDRAM slots. Memory modules can be installed to provide a maximum of 4GB. Memory modules are available in 512MB, 1024MB and 2048MB sizes.

-200-pin small-size DIMM

-1.8V operation

-DDR2-667/800 support

‰BIOS ROM (Flash memory)

-8Mbit (512K⋅16-bit chip)

301KB used for Animation

288KB used for system BIOS

64KB used for VGA-BIOS

64KB used for Finger Print

32KB used for ACPI

24KB used for booting

16KB used for Parameter Block

Others

1-10 [CONFIDENTIAL] TECRA M10 Maintenance Manual (960-685)